blob: f6720a38e8de5ea5bd56af63e2b30315fd8cd8ad (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
/*
* Copyright (c) 2008-2017, NVIDIA CORPORATION. All rights reserved.
*
* NVIDIA CORPORATION and its licensors retain all intellectual property
* and proprietary rights in and to this software, related documentation
* and any modifications thereto. Any use, reproduction, disclosure or
* distribution of this software and related documentation without an express
* license agreement from NVIDIA CORPORATION is strictly prohibited.
*/
#ifndef __APEX_INTEROPABLE_BUFFER_H__
#define __APEX_INTEROPABLE_BUFFER_H__
typedef struct CUgraphicsResource_st *CUgraphicsResource;
namespace physx
{
class PxCudaContextManager;
}
namespace nvidia
{
namespace apex
{
class ApexInteropableBuffer
{
public:
ApexInteropableBuffer(bool mustBeRegistered = false, PxCudaContextManager *interopContext = NULL)
: m_mustBeRegisteredInCUDA(mustBeRegistered)
, m_registeredInCUDA(false)
, m_interopContext(interopContext)
, m_InteropHandle(NULL)
{
}
virtual bool getInteropResourceHandle(CUgraphicsResource &handle)
{
if(m_registeredInCUDA && m_InteropHandle)
{
handle = m_InteropHandle;
return true;
}
return false;
}
protected:
bool m_mustBeRegisteredInCUDA;
bool m_registeredInCUDA;
PxCudaContextManager *m_interopContext;
CUgraphicsResource m_InteropHandle;
};
}
} // end namespace nvidia::apex
#endif // __APEX_INTEROPABLE_BUFFER_H__
|