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+// This code contains NVIDIA Confidential Information and is disclosed to you
+// under a form of NVIDIA software license agreement provided separately to you.
+//
+// Notice
+// NVIDIA Corporation and its licensors retain all intellectual property and
+// proprietary rights in and to this software and related documentation and
+// any modifications thereto. Any use, reproduction, disclosure, or
+// distribution of this software and related documentation without an express
+// license agreement from NVIDIA Corporation is strictly prohibited.
+//
+// ALL NVIDIA DESIGN SPECIFICATIONS, CODE ARE PROVIDED "AS IS.". NVIDIA MAKES
+// NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO
+// THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT,
+// MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE.
+//
+// Information and code furnished is believed to be accurate and reliable.
+// However, NVIDIA Corporation assumes no responsibility for the consequences of use of such
+// information or for any infringement of patents or other rights of third parties that may
+// result from its use. No license is granted by implication or otherwise under any patent
+// or patent rights of NVIDIA Corporation. Details are subject to change without notice.
+// This code supersedes and replaces all information previously supplied.
+// NVIDIA Corporation products are not authorized for use as critical
+// components in life support devices or systems without express written approval of
+// NVIDIA Corporation.
+//
+// Copyright (c) 2008-2014 NVIDIA Corporation. All rights reserved.
+// Copyright (c) 2004-2008 AGEIA Technologies, Inc. All rights reserved.
+// Copyright (c) 2001-2004 NovodeX AG. All rights reserved.
+#ifndef NV_XBOX360_NVXBOX360INTRINSICS_H
+#define NV_XBOX360_NVXBOX360INTRINSICS_H
+
+#include "Nv.h"
+#include "NvAssert.h"
+
+#if !NV_X360
+#error "This file should only be included by xbox builds!!"
+#endif
+
+#ifndef NOMINMAX
+#define NOMINMAX
+#endif
+
+#ifndef XM_NO_OPERATOR_OVERLOADS
+#define XM_NO_OPERATOR_OVERLOADS
+#endif
+
+#pragma warning(push)
+// 'symbol' is not defined as a preprocessor macro, replacing with '0' for 'directives'
+// enumerator 'identifier' in switch of enum 'enumeration' is not handled
+#pragma warning(disable : 4061 4062 4668 4365)
+#include <xtl.h>
+#pragma warning(pop)
+
+#include <PPCIntrinsics.h>
+#include <math.h>
+#include <float.h>
+
+namespace nvidia
+{
+namespace intrinsics
+{
+//! \brief platform-specific absolute value
+NV_FORCE_INLINE float abs(float a)
+{
+ return __fabs(a);
+}
+
+//! \brief platform-specific select float
+NV_FORCE_INLINE float fsel(float a, float b, float c)
+{
+ return __fself(a, b, c);
+}
+
+//! \brief platform-specific sign
+NV_FORCE_INLINE float sign(float a)
+{
+ return __fself(a, 1.0f, -1.0f);
+}
+
+//! \brief platform-specific reciprocal
+NV_FORCE_INLINE float recip(float a)
+{
+ return 1.0f / (a);
+}
+
+//! \brief platform-specific reciprocal estimate
+NV_FORCE_INLINE float recipFast(float a)
+{
+ return __fres(a);
+}
+
+//! \brief platform-specific square root
+NV_FORCE_INLINE float sqrt(float a)
+{
+ return __fsqrts(a);
+}
+
+//! \brief platform-specific reciprocal square root
+NV_FORCE_INLINE float recipSqrt(float a)
+{
+ return recip(__fsqrts(a));
+}
+
+//! \brief platform-specific reciprocal square root estimate
+NV_FORCE_INLINE float recipSqrtFast(float a)
+{
+ return float(__frsqrte(a));
+}
+
+//! \brief platform-specific sine
+NV_FORCE_INLINE float sin(float a)
+{
+ return ::sinf(a);
+}
+
+//! \brief platform-specific cosine
+NV_FORCE_INLINE float cos(float a)
+{
+ return ::cosf(a);
+}
+
+//! \brief platform-specific minimum
+NV_FORCE_INLINE float selectMin(float a, float b)
+{
+ return __fself(a - b, b, a);
+}
+
+//! \brief platform-specific maximum
+NV_FORCE_INLINE float selectMax(float a, float b)
+{
+ return __fself(a - b, a, b);
+}
+
+//! \brief platform-specific finiteness check (not INF or NAN)
+NV_FORCE_INLINE bool isFinite(float a)
+{
+ return 0 == ((_FPCLASS_SNAN | _FPCLASS_QNAN | _FPCLASS_NINF | _FPCLASS_PINF) & _fpclass(a));
+}
+
+//! \brief platform-specific finiteness check (not INF or NAN)
+NV_FORCE_INLINE bool isFinite(double a)
+{
+ return 0 == ((_FPCLASS_SNAN | _FPCLASS_QNAN | _FPCLASS_NINF | _FPCLASS_PINF) & _fpclass(a));
+}
+
+/*!
+Sets \c count bytes starting at \c dst to zero.
+*/
+NV_FORCE_INLINE void* memZero(void* NV_RESTRICT dest, uint32_t count)
+{
+ return XMemSet(dest, 0, count);
+}
+
+/*!
+Sets \c count bytes starting at \c dst to \c c.
+*/
+NV_FORCE_INLINE void* memSet(void* NV_RESTRICT dest, int32_t c, uint32_t count)
+{
+ return XMemSet(dest, c, count);
+}
+
+/*!
+Copies \c count bytes from \c src to \c dst. User memMove if regions overlap.
+*/
+NV_FORCE_INLINE void* memCopy(void* NV_RESTRICT dest, const void* NV_RESTRICT src, uint32_t count)
+{
+ return XMemCpy(dest, src, count);
+}
+
+/*!
+Copies \c count bytes from \c src to \c dst. Supports overlapping regions.
+*/
+NV_FORCE_INLINE void* memMove(void* NV_RESTRICT dest, const void* NV_RESTRICT src, uint32_t count)
+{
+ return memmove(dest, src, count);
+}
+
+/*!
+Set 128B to zero starting at \c dst+offset. Must be aligned.
+*/
+NV_FORCE_INLINE void memZero128(void* NV_RESTRICT dest, uint32_t offset = 0)
+{
+ NV_ASSERT(((size_t(dest) + offset) & 0x7f) == 0);
+ __dcbz128((int)offset, dest);
+}
+
+} // namespace intrinsics
+} // namespace nvidia
+#endif // #ifndef NV_XBOX360_NVXBOX360INTRINSICS_H