diff options
| author | git perforce import user <a@b> | 2016-10-25 12:29:14 -0600 |
|---|---|---|
| committer | Sheikh Dawood Abdul Ajees <Sheikh Dawood Abdul Ajees> | 2016-10-25 18:56:37 -0500 |
| commit | 3dfe2108cfab31ba3ee5527e217d0d8e99a51162 (patch) | |
| tree | fa6485c169e50d7415a651bf838f5bcd0fd3bfbd /APEX_1.4/module/basicios/cuda/include/common.h | |
| download | physx-3.4-3dfe2108cfab31ba3ee5527e217d0d8e99a51162.tar.xz physx-3.4-3dfe2108cfab31ba3ee5527e217d0d8e99a51162.zip | |
Initial commit:
PhysX 3.4.0 Update @ 21294896
APEX 1.4.0 Update @ 21275617
[CL 21300167]
Diffstat (limited to 'APEX_1.4/module/basicios/cuda/include/common.h')
| -rw-r--r-- | APEX_1.4/module/basicios/cuda/include/common.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/APEX_1.4/module/basicios/cuda/include/common.h b/APEX_1.4/module/basicios/cuda/include/common.h new file mode 100644 index 00000000..e530b9bc --- /dev/null +++ b/APEX_1.4/module/basicios/cuda/include/common.h @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2008-2015, NVIDIA CORPORATION. All rights reserved. + * + * NVIDIA CORPORATION and its licensors retain all intellectual property + * and proprietary rights in and to this software, related documentation + * and any modifications thereto. Any use, reproduction, disclosure or + * distribution of this software and related documentation without an express + * license agreement from NVIDIA CORPORATION is strictly prohibited. + */ + + +#ifndef __COMMON_H__ +#define __COMMON_H__ + +#define APEX_CUDA_MODULE_PREFIX BasicIOS_ + +#include "ApexCuda.h" +#include "InplaceTypes.h" +#include "IofxManagerIntl.h" +#include <float.h> + +#if PX_WINDOWS_FAMILY +#pragma warning(push) +#pragma warning(disable:4201) +#pragma warning(disable:4408) +#endif + +#include <vector_types.h> + +#if PX_WINDOWS_FAMILY +#pragma warning(pop) +#endif + +const unsigned int HISTOGRAM_BIN_COUNT = 256; +const unsigned int HISTOGRAM_SIMULATE_BIN_COUNT = 512; + + +#define COMPACT_KERNEL_CONFIG (0, WARP_SIZE * 3) +#define HISTOGRAM_KERNEL_CONFIG (0, HISTOGRAM_BIN_COUNT) +#define REDUCE_KERNEL_CONFIG (0, WARP_SIZE * 4) +#define SCAN_KERNEL_CONFIG (0, WARP_SIZE * 4) +#define SIMULATE_KERNEL_CONFIG (0, HISTOGRAM_SIMULATE_BIN_COUNT) + + +const unsigned int HOLE_SCAN_FLAG_BIT = 31; +const unsigned int HOLE_SCAN_FLAG = (1U << HOLE_SCAN_FLAG_BIT); +const unsigned int HOLE_SCAN_MASK = (HOLE_SCAN_FLAG - 1); + +// mTmpOutput +const unsigned int STATUS_LAST_ACTIVE_COUNT = 0; +const unsigned int STATUS_LAST_BENEFIT_SUM = 1; +const unsigned int STATUS_LAST_BENEFIT_MIN = 2; +const unsigned int STATUS_LAST_BENEFIT_MAX = 3; + +namespace nvidia +{ +namespace basicios +{ + +} +} // namespace nvidia + +#endif |