Initial 1.1.0 binary release

12 files changed, 2052 insertions, 0 deletions

diff --git a/external/ags_lib/.gitattributes b/external/ags_lib/.gitattributes
new file mode 100644
index 0000000..56f15ab
--- /dev/null
+++ b/external/ags_lib/.gitattributes
@@ -0,0 +1,11 @@
+# This is a windows-only project. Force CRLF.
+* text eol=crlf
+
+# Explicit settings for specific file types.
+*.h         eol=crlf
+*.txt       eol=crlf
+*.md        eol=crlf
+*.pdf       binary
+*.png       binary
+*.dll       binary
+*.lib       binary
diff --git a/external/ags_lib/CHANGELOG.md b/external/ags_lib/CHANGELOG.md
new file mode 100644
index 0000000..867a35e
--- /dev/null
+++ b/external/ags_lib/CHANGELOG.md
@@ -0,0 +1,37 @@
+# AMD AGS Library Changelog
+
+### v4.0.3 - 2016-08-18
+* Improve support for DirectX 11 and DirectX 12 GCN shader extensions
+* Add support for Multidraw Indirect Count Indirect for DirectX 11
+* Fix clock speed information for Polaris GPUs
+* Requires Radeon Software Crimson Edition 16.9.1 (driver version 16.40) or later
+
+### v4.0.0 - 2016-05-24
+* Add support for GCN shader extensions
+  * Shader extensions are exposed for both DirectX 11 and DirectX 12
+  * Requires Radeon Software Crimson Edition 16.5.2 or later
+* Remove `RegisterApp` from the extension API
+  * This extension is not currently supported in the driver
+
+### v3.2.2 - 2016-05-23
+* Add back `radeonSoftwareVersion` now that updated driver is public
+  * Radeon Software Crimson Edition 16.5.2 or later
+* Fix GPU info when primary adapter is > 0
+* Update the implementation of agsDriverExtensions_NotifyResourceEndWrites
+
+### v3.2.0 - 2016-02-12
+* Add ability to disable Crossfire
+  * This is in addition to the existing ability to enable the explicit Crossfire API
+  * Desired Crossfire mode is now passed in to `agsInit`
+  * Separate `SetCrossfireMode` function has been removed from the AGS API
+  * The `agsInit` function should now be called **prior to device creation**
+* Return library version number in the optional info parameter of `agsInit`
+* Build amd_ags DLLs such that they do not depend on any Microsoft Visual C++ redistributable packages
+
+### v3.1.1 - 2016-01-28
+* Return null for the context when initialization fails
+* Add version number defines to `amd_ags.h`
+* Remove `radeonSoftwareVersion` until needed driver update is public
+
+### v3.1.0 - 2016-01-26
+* Initial release on GitHub
diff --git a/external/ags_lib/LICENSE.txt b/external/ags_lib/LICENSE.txt
new file mode 100644
index 0000000..1bebf79
--- /dev/null
+++ b/external/ags_lib/LICENSE.txt
@@ -0,0 +1,19 @@
+Copyright (c) 2016 Advanced Micro Devices, Inc. All rights reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
diff --git a/external/ags_lib/README.md b/external/ags_lib/README.md
new file mode 100644
index 0000000..134b0fc
--- /dev/null
+++ b/external/ags_lib/README.md
@@ -0,0 +1,7 @@
+# AMD AGS Library
+![AMD AGS Library](http://gpuopen-librariesandsdks.github.io/media/amd_logo_black.png)
+
+The AMD GPU Services (AGS) library provides software developers with the ability to query AMD GPU software and hardware state information that is not normally available through standard operating systems or graphic APIs. Version 4.0 of the library includes support for querying graphics driver version info, GPU performance, Crossfire™ (AMD's multi-GPU rendering technology) configuration info, and Eyefinity (AMD's multi-display rendering technology) configuration info. AGS also exposes the explicit Crossfire API extension, GCN shader extensions, and additional extensions supported in the AMD drivers for DirectX 11 and DirectX 12.
+
+This version of the AGS library is just the documentation, header file, import libraries, and DLLs. For the full AGS SDK, which includes samples, visit the AGS SDK repository:
+https://github.com/GPUOpen-LibrariesAndSDKs/AGS_SDK
diff --git a/external/ags_lib/doc/AGS Documentation.pdf b/external/ags_lib/doc/AGS Documentation.pdf
new file mode 100644
index 0000000..e5fae1a
--- /dev/null
+++ b/external/ags_lib/doc/AGS Documentation.pdf
diff --git a/external/ags_lib/hlsl/ags_shader_intrinsics_dx11.hlsl b/external/ags_lib/hlsl/ags_shader_intrinsics_dx11.hlsl
new file mode 100644
index 0000000..b2c59fa
--- /dev/null
+++ b/external/ags_lib/hlsl/ags_shader_intrinsics_dx11.hlsl
@@ -0,0 +1,746 @@
+//
+// Copyright (c) 2016 Advanced Micro Devices, Inc. All rights reserved.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+//
+
+/**
+*************************************************************************************************************
+* @File  ags_shader_intrinsics_dx11.hlsl
+*
+* @brief
+*    AMD D3D Shader Intrinsics API hlsl file.
+*    This include file contains the shader intrinsics definitions (structures, enums, constant)
+*    and HLSL shader intrinsics functions.
+*
+*************************************************************************************************************
+*/
+
+#ifndef _AMDDXEXTSHADERINTRINSICS_HLSL_
+#define _AMDDXEXTSHADERINTRINSICS_HLSL_
+
+/**
+*************************************************************************************************************
+*   Definitions to construct the intrinsic instruction composed of an opcode and optional immediate data.
+*************************************************************************************************************
+*/
+#define AmdDxExtShaderIntrinsics_MagicCodeShift   28
+#define AmdDxExtShaderIntrinsics_MagicCodeMask    0xf
+#define AmdDxExtShaderIntrinsics_OpcodePhaseShift 24
+#define AmdDxExtShaderIntrinsics_OpcodePhaseMask  0x3
+#define AmdDxExtShaderIntrinsics_DataShift        8
+#define AmdDxExtShaderIntrinsics_DataMask         0xffff
+#define AmdDxExtShaderIntrinsics_OpcodeShift      0
+#define AmdDxExtShaderIntrinsics_OpcodeMask       0xff
+
+#define AmdDxExtShaderIntrinsics_MagicCode        0x5
+
+
+/**
+*************************************************************************************************************
+*   Intrinsic opcodes.
+*************************************************************************************************************
+*/
+#define AmdDxExtShaderIntrinsicsOpcode_Readfirstlane  0x01
+#define AmdDxExtShaderIntrinsicsOpcode_Readlane       0x02
+#define AmdDxExtShaderIntrinsicsOpcode_LaneId         0x03
+#define AmdDxExtShaderIntrinsicsOpcode_Swizzle        0x04
+#define AmdDxExtShaderIntrinsicsOpcode_Ballot         0x05
+#define AmdDxExtShaderIntrinsicsOpcode_MBCnt          0x06
+#define AmdDxExtShaderIntrinsicsOpcode_Min3U          0x08
+#define AmdDxExtShaderIntrinsicsOpcode_Min3F          0x09
+#define AmdDxExtShaderIntrinsicsOpcode_Med3U          0x0a
+#define AmdDxExtShaderIntrinsicsOpcode_Med3F          0x0b
+#define AmdDxExtShaderIntrinsicsOpcode_Max3U          0x0c
+#define AmdDxExtShaderIntrinsicsOpcode_Max3F          0x0d
+#define AmdDxExtShaderIntrinsicsOpcode_BaryCoord      0x0e
+#define AmdDxExtShaderIntrinsicsOpcode_VtxParam       0x0f
+
+
+/**
+*************************************************************************************************************
+*   Intrinsic opcode phases.
+*************************************************************************************************************
+*/
+#define AmdDxExtShaderIntrinsicsOpcodePhase_0    0x0
+#define AmdDxExtShaderIntrinsicsOpcodePhase_1    0x1
+#define AmdDxExtShaderIntrinsicsOpcodePhase_2    0x2
+#define AmdDxExtShaderIntrinsicsOpcodePhase_3    0x3
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsicsSwizzle defines for common swizzles.  Can be used as the operation parameter for
+*   the AmdDxExtShaderIntrinsics_Swizzle intrinsic.
+*************************************************************************************************************
+*/
+#define AmdDxExtShaderIntrinsicsSwizzle_SwapX1      0x041f
+#define AmdDxExtShaderIntrinsicsSwizzle_SwapX2      0x081f
+#define AmdDxExtShaderIntrinsicsSwizzle_SwapX4      0x101f
+#define AmdDxExtShaderIntrinsicsSwizzle_SwapX8      0x201f
+#define AmdDxExtShaderIntrinsicsSwizzle_SwapX16     0x401f
+#define AmdDxExtShaderIntrinsicsSwizzle_ReverseX2   0x041f
+#define AmdDxExtShaderIntrinsicsSwizzle_ReverseX4   0x0c1f
+#define AmdDxExtShaderIntrinsicsSwizzle_ReverseX8   0x1c1f
+#define AmdDxExtShaderIntrinsicsSwizzle_ReverseX16  0x3c1f
+#define AmdDxExtShaderIntrinsicsSwizzle_ReverseX32  0x7c1f
+#define AmdDxExtShaderIntrinsicsSwizzle_BCastX2     0x003e
+#define AmdDxExtShaderIntrinsicsSwizzle_BCastX4     0x003c
+#define AmdDxExtShaderIntrinsicsSwizzle_BCastX8     0x0038
+#define AmdDxExtShaderIntrinsicsSwizzle_BCastX16    0x0030
+#define AmdDxExtShaderIntrinsicsSwizzle_BCastX32    0x0020
+
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsicsBarycentric defines for barycentric interpolation mode.  To be used with
+*   AmdDxExtShaderIntrinsicsOpcode_IjBarycentricCoords to specify the interpolation mode.
+*************************************************************************************************************
+*/
+#define AmdDxExtShaderIntrinsicsBarycentric_LinearCenter    0x1
+#define AmdDxExtShaderIntrinsicsBarycentric_LinearCentroid  0x2
+#define AmdDxExtShaderIntrinsicsBarycentric_LinearSample    0x3
+#define AmdDxExtShaderIntrinsicsBarycentric_PerspCenter     0x4
+#define AmdDxExtShaderIntrinsicsBarycentric_PerspCentroid   0x5
+#define AmdDxExtShaderIntrinsicsBarycentric_PerspSample     0x6
+#define AmdDxExtShaderIntrinsicsBarycentric_PerspPullModel  0x7
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsicsBarycentric defines for specifying vertex and parameter indices.  To be used as
+*   the inputs to the AmdDxExtShaderIntrinsicsOpcode_VertexParameter function
+*************************************************************************************************************
+*/
+#define AmdDxExtShaderIntrinsicsBarycentric_Vertex0     0x0
+#define AmdDxExtShaderIntrinsicsBarycentric_Vertex1     0x1
+#define AmdDxExtShaderIntrinsicsBarycentric_Vertex2     0x2
+
+#define AmdDxExtShaderIntrinsicsBarycentric_Param0      0x00
+#define AmdDxExtShaderIntrinsicsBarycentric_Param1      0x01
+#define AmdDxExtShaderIntrinsicsBarycentric_Param2      0x02
+#define AmdDxExtShaderIntrinsicsBarycentric_Param3      0x03
+#define AmdDxExtShaderIntrinsicsBarycentric_Param4      0x04
+#define AmdDxExtShaderIntrinsicsBarycentric_Param5      0x05
+#define AmdDxExtShaderIntrinsicsBarycentric_Param6      0x06
+#define AmdDxExtShaderIntrinsicsBarycentric_Param7      0x07
+#define AmdDxExtShaderIntrinsicsBarycentric_Param8      0x08
+#define AmdDxExtShaderIntrinsicsBarycentric_Param9      0x09
+#define AmdDxExtShaderIntrinsicsBarycentric_Param10     0x0a
+#define AmdDxExtShaderIntrinsicsBarycentric_Param11     0x0b
+#define AmdDxExtShaderIntrinsicsBarycentric_Param12     0x0c
+#define AmdDxExtShaderIntrinsicsBarycentric_Param13     0x0d
+#define AmdDxExtShaderIntrinsicsBarycentric_Param14     0x0e
+#define AmdDxExtShaderIntrinsicsBarycentric_Param15     0x0f
+#define AmdDxExtShaderIntrinsicsBarycentric_Param16     0x10
+#define AmdDxExtShaderIntrinsicsBarycentric_Param17     0x11
+#define AmdDxExtShaderIntrinsicsBarycentric_Param18     0x12
+#define AmdDxExtShaderIntrinsicsBarycentric_Param19     0x13
+#define AmdDxExtShaderIntrinsicsBarycentric_Param20     0x14
+#define AmdDxExtShaderIntrinsicsBarycentric_Param21     0x15
+#define AmdDxExtShaderIntrinsicsBarycentric_Param22     0x16
+#define AmdDxExtShaderIntrinsicsBarycentric_Param23     0x17
+#define AmdDxExtShaderIntrinsicsBarycentric_Param24     0x18
+#define AmdDxExtShaderIntrinsicsBarycentric_Param25     0x19
+#define AmdDxExtShaderIntrinsicsBarycentric_Param26     0x1a
+#define AmdDxExtShaderIntrinsicsBarycentric_Param27     0x1b
+#define AmdDxExtShaderIntrinsicsBarycentric_Param28     0x1c
+#define AmdDxExtShaderIntrinsicsBarycentric_Param29     0x1d
+#define AmdDxExtShaderIntrinsicsBarycentric_Param30     0x1e
+#define AmdDxExtShaderIntrinsicsBarycentric_Param31     0x1f
+
+#define AmdDxExtShaderIntrinsicsBarycentric_ComponentX  0x0
+#define AmdDxExtShaderIntrinsicsBarycentric_ComponentY  0x1
+#define AmdDxExtShaderIntrinsicsBarycentric_ComponentZ  0x2
+#define AmdDxExtShaderIntrinsicsBarycentric_ComponentW  0x3
+
+#define AmdDxExtShaderIntrinsicsBarycentric_ParamShift     0
+#define AmdDxExtShaderIntrinsicsBarycentric_ParamMask      0x1f
+#define AmdDxExtShaderIntrinsicsBarycentric_VtxShift       0x5
+#define AmdDxExtShaderIntrinsicsBarycentric_VtxMask        0x3
+#define AmdDxExtShaderIntrinsicsBarycentric_ComponentShift 0x7
+#define AmdDxExtShaderIntrinsicsBarycentric_ComponentMask  0x3
+
+/**
+*************************************************************************************************************
+*   Resource slots
+*************************************************************************************************************
+*/
+#ifndef AmdDxExtShaderIntrinsicsUAVSlot
+#define AmdDxExtShaderIntrinsicsUAVSlot       u7
+#endif
+
+RWByteAddressBuffer AmdDxExtShaderIntrinsicsUAV : register(AmdDxExtShaderIntrinsicsUAVSlot);
+
+/**
+*************************************************************************************************************
+*   MakeAmdShaderIntrinsicsInstruction
+*
+*   Creates instruction from supplied opcode and immediate data.
+*   NOTE: This is an internal function and should not be called by the source HLSL shader directly.
+*
+*************************************************************************************************************
+*/
+uint MakeAmdShaderIntrinsicsInstruction(uint opcode, uint opcodePhase, uint immediateData)
+{
+    return ((AmdDxExtShaderIntrinsics_MagicCode << AmdDxExtShaderIntrinsics_MagicCodeShift) |
+            (immediateData << AmdDxExtShaderIntrinsics_DataShift) |
+            (opcodePhase << AmdDxExtShaderIntrinsics_OpcodePhaseShift) |
+            (opcode << AmdDxExtShaderIntrinsics_OpcodeShift));
+}
+
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_ReadfirstlaneF
+*
+*   Returns the value of float src for the first active lane of the wavefront.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Readfirstlane) returned S_OK.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_ReadfirstlaneF(float src)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Readfirstlane,
+                                                          0, 0);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, asuint(src), 0, retVal);
+    return asfloat(retVal);
+}
+
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_ReadfirstlaneU
+*
+*   Returns the value of unsigned integer src for the first active lane of the wavefront.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Readfirstlane) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_ReadfirstlaneU(uint src)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Readfirstlane,
+                                                          0, 0);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src, 0, retVal);
+    return retVal;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Readlane
+*
+*   Returns the value of float src for the lane within the wavefront specified by laneId.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Readlane) returned S_OK.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_ReadlaneF(float src, uint laneId)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Readlane, 0,
+                                                          laneId);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, asuint(src), 0, retVal);
+    return asfloat(retVal);
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_ReadlaneU
+*
+*   Returns the value of unsigned integer src for the lane within the wavefront specified by laneId.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Readlane) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_ReadlaneU(uint src, uint laneId)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Readlane, 0,
+                                                          laneId);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src, 0, retVal);
+    return retVal;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_LaneId
+*
+*   Returns the current lane id for the thread within the wavefront.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_LaneId) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_LaneId()
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_LaneId, 0, 0);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal);
+    return retVal;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Swizzle
+*
+*   Generic instruction to shuffle the float src value among different lanes as specified by the
+*   operation.
+*   Note that the operation parameter must be an immediately specified value not a value from a variable.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Swizzle) returned S_OK.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_SwizzleF(float src, uint operation)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Swizzle, 0,
+                                                          operation);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, asuint(src), 0, retVal);
+    return asfloat(retVal);
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_SwizzleU
+*
+*   Generic instruction to shuffle the unsigned integer src value among different lanes as specified by the
+*   operation.
+*   Note that the operation parameter must be an immediately specified value not a value from a variable.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Swizzle) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_SwizzleU(uint src, uint operation)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Swizzle, 0,
+                                                          operation);
+
+    uint retVal;
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src, 0, retVal);
+    return retVal;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Ballot
+*
+*   Given an input predicate returns a bit mask indicating for which lanes the predicate is true.
+*   Inactive or non-existent lanes will always return 0.  The number of existent lanes is the
+*   wavefront size.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Ballot) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint2 AmdDxExtShaderIntrinsics_Ballot(bool predicate)
+{
+    uint instruction;
+
+    uint retVal1;
+    instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Ballot,
+                                                     AmdDxExtShaderIntrinsicsOpcodePhase_0, 0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, predicate, 0, retVal1);
+
+    uint retVal2;
+    instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Ballot,
+                                                     AmdDxExtShaderIntrinsicsOpcodePhase_1, 0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, predicate, 0, retVal2);
+
+    return uint2(retVal1, retVal2);
+}
+
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_BallotAny
+*
+*   Convenience routine that uses Ballot and returns true if for any of the active lanes the predicate
+*   is true.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Ballot) returned S_OK.
+*
+*************************************************************************************************************
+*/
+bool AmdDxExtShaderIntrinsics_BallotAny(bool predicate)
+{
+    uint2 retVal = AmdDxExtShaderIntrinsics_Ballot(predicate);
+
+    return ((retVal.x | retVal.y) != 0 ? true : false);
+}
+
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_BallotAll
+*
+*   Convenience routine that uses Ballot and returns true if for all of the active lanes the predicate
+*   is true.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Ballot) returned S_OK.
+*
+*************************************************************************************************************
+*/
+bool AmdDxExtShaderIntrinsics_BallotAll(bool predicate)
+{
+    uint2 ballot = AmdDxExtShaderIntrinsics_Ballot(predicate);
+
+    uint2 execMask = AmdDxExtShaderIntrinsics_Ballot(true);
+
+    return ((ballot.x == execMask.x) && (ballot.y == execMask.y));
+}
+
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_MBCnt
+*
+*   Returns the masked bit count of the source register for this thread within all the active threads
+*   within a wavefront.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_MBCnt) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_MBCnt(uint2 src)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_MBCnt, 0, 0);
+
+    uint retVal;
+
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src.x, src.y, retVal);
+
+    return retVal;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Min3F
+*
+*   Returns the minimum value of the three floating point source arguments.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_Min3F(float src0, float src1, float src2)
+{
+    uint minimum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Min3F,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, asuint(src0), asuint(src1), minimum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Min3F,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, asuint(src2), minimum, minimum);
+
+    return asfloat(minimum);
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Min3U
+*
+*   Returns the minimum value of the three unsigned integer source arguments.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_Min3U(uint src0, uint src1, uint src2)
+{
+    uint minimum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Min3U,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, src0, src1, minimum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Min3U,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, src2, minimum, minimum);
+
+    return minimum;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Med3F
+*
+*   Returns the median value of the three floating point source arguments.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_Med3F(float src0, float src1, float src2)
+{
+    uint median;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Med3F,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, asuint(src0), asuint(src1), median);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Med3F,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, asuint(src2), median, median);
+
+    return asfloat(median);
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Med3U
+*
+*   Returns the median value of the three unsigned integer source arguments.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_Med3U(uint src0, uint src1, uint src2)
+{
+    uint median;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Med3U,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, src0, src1, median);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Med3U,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, src2, median, median);
+
+    return median;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Max3F
+*
+*   Returns the maximum value of the three floating point source arguments.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_Max3F(float src0, float src1, float src2)
+{
+    uint maximum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Max3F,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, asuint(src0), asuint(src1), maximum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Max3F,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, asuint(src2), maximum, maximum);
+
+    return asfloat(maximum);
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_Max3U
+*
+*   Returns the maximum value of the three unsigned integer source arguments.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+*************************************************************************************************************
+*/
+uint AmdDxExtShaderIntrinsics_Max3U(uint src0, uint src1, uint src2)
+{
+    uint maximum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Max3U,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, src0, src1, maximum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_Max3U,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, src2, maximum, maximum);
+
+    return maximum;
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_IjBarycentricCoords
+*
+*   Returns the (i, j) barycentric coordinate pair for this shader invocation with the specified
+*   interpolation mode at the specified pixel location.  Should not be used for "pull-model" interpolation,
+*   PullModelBarycentricCoords should be used instead
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_BaryCoord) returned S_OK.
+*
+*   Can only be used in pixel shader stages.
+*
+*************************************************************************************************************
+*/
+float2 AmdDxExtShaderIntrinsics_IjBarycentricCoords(uint interpMode)
+{
+    uint2 retVal;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           interpMode);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, 0, 0, retVal.x);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           interpMode);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, retVal.x, 0, retVal.y);
+
+    return float2(asfloat(retVal.x), asfloat(retVal.y));
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_PullModelBarycentricCoords
+*
+*   Returns the (1/W,1/I,1/J) coordinates at the pixel center which can be used for custom interpolation at
+*   any location in the pixel.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_BaryCoord) returned S_OK.
+*
+*   Can only be used in pixel shader stages.
+*
+*************************************************************************************************************
+*/
+float3 AmdDxExtShaderIntrinsics_PullModelBarycentricCoords()
+{
+    uint3 retVal;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                                                           AmdDxExtShaderIntrinsicsBarycentric_PerspPullModel);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, 0, 0, retVal.x);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_1,
+                                                           AmdDxExtShaderIntrinsicsBarycentric_PerspPullModel);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, retVal.x, 0, retVal.y);
+
+    uint instruction3 = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdDxExtShaderIntrinsicsOpcodePhase_2,
+                                                           AmdDxExtShaderIntrinsicsBarycentric_PerspPullModel);
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction3, retVal.y, 0, retVal.z);
+
+    return float3(asfloat(retVal.x), asfloat(retVal.y), asfloat(retVal.z));
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_VertexParameter
+*
+*   Returns the triangle's parameter information at the specified triangle vertex.
+*   The vertex and parameter indices must specified as immediate values.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_VtxParam) returned S_OK.
+*
+*   Only available in pixel shader stages.
+*
+*************************************************************************************************************
+*/
+float4 AmdDxExtShaderIntrinsics_VertexParameter(uint vertexIdx, uint parameterIdx)
+{
+    uint4 retVal;
+    uint4 instruction;
+
+    instruction.x = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_VtxParam,
+                                 AmdDxExtShaderIntrinsicsOpcodePhase_0,
+      ((vertexIdx << AmdDxExtShaderIntrinsicsBarycentric_VtxShift) |
+       (parameterIdx << AmdDxExtShaderIntrinsicsBarycentric_ParamShift) |
+       (AmdDxExtShaderIntrinsicsBarycentric_ComponentX << AmdDxExtShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.x, 0, 0, retVal.x);
+
+    instruction.y = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_VtxParam,
+                                 AmdDxExtShaderIntrinsicsOpcodePhase_0,
+      ((vertexIdx << AmdDxExtShaderIntrinsicsBarycentric_VtxShift) |
+       (parameterIdx << AmdDxExtShaderIntrinsicsBarycentric_ParamShift) |
+       (AmdDxExtShaderIntrinsicsBarycentric_ComponentY << AmdDxExtShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.y, 0, 0, retVal.y);
+
+    instruction.z = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_VtxParam,
+                                 AmdDxExtShaderIntrinsicsOpcodePhase_0,
+      ((vertexIdx << AmdDxExtShaderIntrinsicsBarycentric_VtxShift) |
+       (parameterIdx << AmdDxExtShaderIntrinsicsBarycentric_ParamShift) |
+       (AmdDxExtShaderIntrinsicsBarycentric_ComponentZ << AmdDxExtShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.z, 0, 0, retVal.z);
+
+    instruction.w = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_VtxParam,
+                                 AmdDxExtShaderIntrinsicsOpcodePhase_0,
+      ((vertexIdx << AmdDxExtShaderIntrinsicsBarycentric_VtxShift) |
+       (parameterIdx << AmdDxExtShaderIntrinsicsBarycentric_ParamShift) |
+       (AmdDxExtShaderIntrinsicsBarycentric_ComponentW << AmdDxExtShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.w, 0, 0, retVal.w);
+
+    return float4(asfloat(retVal.x), asfloat(retVal.y), asfloat(retVal.z), asfloat(retVal.w));
+}
+
+/**
+*************************************************************************************************************
+*   AmdDxExtShaderIntrinsics_VertexParameterComponent
+*
+*   Returns the triangle's parameter information at the specified triangle vertex and component.
+*   The vertex, parameter and component indices must be specified as immediate values.
+*
+*   Available if CheckSupport(AmdDxExtShaderIntrinsicsSupport_VtxParam) returned S_OK.
+*
+*   Only available in pixel shader stages.
+*
+*************************************************************************************************************
+*/
+float AmdDxExtShaderIntrinsics_VertexParameterComponent(uint vertexIdx, uint parameterIdx, uint componentIdx)
+{
+    uint retVal;
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdDxExtShaderIntrinsicsOpcode_VtxParam,
+                           AmdDxExtShaderIntrinsicsOpcodePhase_0,
+                           ((vertexIdx << AmdDxExtShaderIntrinsicsBarycentric_VtxShift) |
+                            (parameterIdx << AmdDxExtShaderIntrinsicsBarycentric_ParamShift) |
+                            (componentIdx << AmdDxExtShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdDxExtShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal);
+
+    return asfloat(retVal);
+}
+
+#endif // AMD_HLSL_EXTENSION
diff --git a/external/ags_lib/hlsl/ags_shader_intrinsics_dx12.hlsl b/external/ags_lib/hlsl/ags_shader_intrinsics_dx12.hlsl
new file mode 100644
index 0000000..55f63f6
--- /dev/null
+++ b/external/ags_lib/hlsl/ags_shader_intrinsics_dx12.hlsl
@@ -0,0 +1,738 @@
+//
+// Copyright (c) 2016 Advanced Micro Devices, Inc. All rights reserved.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+//
+
+/**
+***********************************************************************************************************************
+* @file  ags_shader_intrinsics_dx12.hlsl
+* @brief
+*    AMD D3D Shader Intrinsics HLSL include file.
+*    This include file contains the Shader Intrinsics definitions used in shader code by the application.
+* @note
+*    This does not work with immediate values or values that the compiler determines can produces denorms
+*
+***********************************************************************************************************************
+*/
+
+#ifndef _AMDEXTD3DSHADERINTRINICS_HLSL
+#define _AMDEXTD3DSHADERINTRINICS_HLSL
+// AMD shader intrinsics designated SpaceId.  Denotes Texture3D resource and static sampler used in conjuction with
+// instrinsic instructions.
+#define AmdExtD3DShaderIntrinsicsSpaceId space2147420894
+// Texture3D and SamplerState used to access AMD shader instrinsics instruction set.
+// Applications need to add descriptor table entries for these when creating root descriptor table.
+///@note Requires SM 5.1 RWBuffer<uint>
+RWByteAddressBuffer AmdExtD3DShaderIntrinsicsUAV : register(u0, AmdExtD3DShaderIntrinsicsSpaceId);
+
+/**
+***********************************************************************************************************************
+*   Definitions to construct the intrinsic instruction composed of an opcode and optional immediate data.
+***********************************************************************************************************************
+*/
+#define AmdExtD3DShaderIntrinsics_MagicCodeShift   28
+#define AmdExtD3DShaderIntrinsics_MagicCodeMask    0xf
+#define AmdExtD3DShaderIntrinsics_OpcodePhaseShift 24
+#define AmdExtD3DShaderIntrinsics_OpcodePhaseMask  0x3
+#define AmdExtD3DShaderIntrinsics_DataShift        8
+#define AmdExtD3DShaderIntrinsics_DataMask         0xffff
+#define AmdExtD3DShaderIntrinsics_OpcodeShift      0
+#define AmdExtD3DShaderIntrinsics_OpcodeMask       0xff
+
+#define AmdExtD3DShaderIntrinsics_MagicCode        0x5
+
+
+/**
+***********************************************************************************************************************
+*   Intrinsic opcodes.
+***********************************************************************************************************************
+*/
+#define AmdExtD3DShaderIntrinsicsOpcode_Readfirstlane  0x01
+#define AmdExtD3DShaderIntrinsicsOpcode_Readlane       0x02
+#define AmdExtD3DShaderIntrinsicsOpcode_LaneId         0x03
+#define AmdExtD3DShaderIntrinsicsOpcode_Swizzle        0x04
+#define AmdExtD3DShaderIntrinsicsOpcode_Ballot         0x05
+#define AmdExtD3DShaderIntrinsicsOpcode_MBCnt          0x06
+#define AmdExtD3DShaderIntrinsicsOpcode_Min3U          0x07
+#define AmdExtD3DShaderIntrinsicsOpcode_Min3F          0x08
+#define AmdExtD3DShaderIntrinsicsOpcode_Med3U          0x09
+#define AmdExtD3DShaderIntrinsicsOpcode_Med3F          0x0a
+#define AmdExtD3DShaderIntrinsicsOpcode_Max3U          0x0b
+#define AmdExtD3DShaderIntrinsicsOpcode_Max3F          0x0c
+#define AmdExtD3DShaderIntrinsicsOpcode_BaryCoord      0x0d
+#define AmdExtD3DShaderIntrinsicsOpcode_VtxParam       0x0e
+
+
+/**
+***********************************************************************************************************************
+*   Intrinsic opcode phases.
+***********************************************************************************************************************
+*/
+#define AmdExtD3DShaderIntrinsicsOpcodePhase_0    0x0
+#define AmdExtD3DShaderIntrinsicsOpcodePhase_1    0x1
+#define AmdExtD3DShaderIntrinsicsOpcodePhase_2    0x2
+#define AmdExtD3DShaderIntrinsicsOpcodePhase_3    0x3
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsicsSwizzle defines for common swizzles.  Can be used as the operation parameter for the
+*   AmdExtD3DShaderIntrinsics_Swizzle intrinsic.
+***********************************************************************************************************************
+*/
+#define AmdExtD3DShaderIntrinsicsSwizzle_SwapX1      0x041f
+#define AmdExtD3DShaderIntrinsicsSwizzle_SwapX2      0x081f
+#define AmdExtD3DShaderIntrinsicsSwizzle_SwapX4      0x101f
+#define AmdExtD3DShaderIntrinsicsSwizzle_SwapX8      0x201f
+#define AmdExtD3DShaderIntrinsicsSwizzle_SwapX16     0x401f
+#define AmdExtD3DShaderIntrinsicsSwizzle_ReverseX2   0x041f
+#define AmdExtD3DShaderIntrinsicsSwizzle_ReverseX4   0x0c1f
+#define AmdExtD3DShaderIntrinsicsSwizzle_ReverseX8   0x1c1f
+#define AmdExtD3DShaderIntrinsicsSwizzle_ReverseX16  0x3c1f
+#define AmdExtD3DShaderIntrinsicsSwizzle_ReverseX32  0x7c1f
+#define AmdExtD3DShaderIntrinsicsSwizzle_BCastX2     0x003e
+#define AmdExtD3DShaderIntrinsicsSwizzle_BCastX4     0x003c
+#define AmdExtD3DShaderIntrinsicsSwizzle_BCastX8     0x0038
+#define AmdExtD3DShaderIntrinsicsSwizzle_BCastX16    0x0030
+#define AmdExtD3DShaderIntrinsicsSwizzle_BCastX32    0x0020
+
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsicsBarycentric defines for barycentric interpolation mode.  To be used with
+*   AmdExtD3DShaderIntrinsicsOpcode_IjBarycentricCoords to specify the interpolation mode.
+***********************************************************************************************************************
+*/
+#define AmdExtD3DShaderIntrinsicsBarycentric_LinearCenter    0x1
+#define AmdExtD3DShaderIntrinsicsBarycentric_LinearCentroid  0x2
+#define AmdExtD3DShaderIntrinsicsBarycentric_LinearSample    0x3
+#define AmdExtD3DShaderIntrinsicsBarycentric_PerspCenter     0x4
+#define AmdExtD3DShaderIntrinsicsBarycentric_PerspCentroid   0x5
+#define AmdExtD3DShaderIntrinsicsBarycentric_PerspSample     0x6
+#define AmdExtD3DShaderIntrinsicsBarycentric_PerspPullModel  0x7
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsicsBarycentric defines for specifying vertex and parameter indices.  To be used as inputs to
+*   the AmdExtD3DShaderIntrinsicsOpcode_VertexParameter function
+***********************************************************************************************************************
+*/
+#define AmdExtD3DShaderIntrinsicsBarycentric_Vertex0        0x0
+#define AmdExtD3DShaderIntrinsicsBarycentric_Vertex1        0x1
+#define AmdExtD3DShaderIntrinsicsBarycentric_Vertex2        0x2
+
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param0         0x00
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param1         0x01
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param2         0x02
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param3         0x03
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param4         0x04
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param5         0x05
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param6         0x06
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param7         0x07
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param8         0x08
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param9         0x09
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param10        0x0a
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param11        0x0b
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param12        0x0c
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param13        0x0d
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param14        0x0e
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param15        0x0f
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param16        0x10
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param17        0x11
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param18        0x12
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param19        0x13
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param20        0x14
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param21        0x15
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param22        0x16
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param23        0x17
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param24        0x18
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param25        0x19
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param26        0x1a
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param27        0x1b
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param28        0x1c
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param29        0x1d
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param30        0x1e
+#define AmdExtD3DShaderIntrinsicsBarycentric_Param31        0x1f
+
+#define AmdExtD3DShaderIntrinsicsBarycentric_ComponentX     0x0
+#define AmdExtD3DShaderIntrinsicsBarycentric_ComponentY     0x1
+#define AmdExtD3DShaderIntrinsicsBarycentric_ComponentZ     0x2
+#define AmdExtD3DShaderIntrinsicsBarycentric_ComponentW     0x3
+
+#define AmdExtD3DShaderIntrinsicsBarycentric_ParamShift     0
+#define AmdExtD3DShaderIntrinsicsBarycentric_ParamMask      0x1f
+#define AmdExtD3DShaderIntrinsicsBarycentric_VtxShift       0x5
+#define AmdExtD3DShaderIntrinsicsBarycentric_VtxMask        0x3
+#define AmdExtD3DShaderIntrinsicsBarycentric_ComponentShift 0x7
+#define AmdExtD3DShaderIntrinsicsBarycentric_ComponentMask  0x3
+
+
+/**
+***********************************************************************************************************************
+*   MakeAmdShaderIntrinsicsInstruction
+*
+*   Creates instruction from supplied opcode and immediate data.
+*   NOTE: This is an internal function and should not be called by the source HLSL shader directly.
+*
+***********************************************************************************************************************
+*/
+uint MakeAmdShaderIntrinsicsInstruction(uint opcode, uint opcodePhase, uint immediateData)
+{
+    return ((AmdExtD3DShaderIntrinsics_MagicCode << AmdExtD3DShaderIntrinsics_MagicCodeShift) |
+            (immediateData << AmdExtD3DShaderIntrinsics_DataShift) |
+            (opcodePhase << AmdExtD3DShaderIntrinsics_OpcodePhaseShift) |
+            (opcode << AmdExtD3DShaderIntrinsics_OpcodeShift));
+}
+
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_ReadfirstlaneF
+*
+*   Returns the value of float src for the first active lane of the wavefront.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Readfirstlane) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_ReadfirstlaneF(float src)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Readfirstlane, 0, 0);
+
+    uint retVal;
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, asuint(src), 0, retVal);
+    return asfloat(retVal);
+}
+
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_ReadfirstlaneU
+*
+*   Returns the value of unsigned integer src for the first active lane of the wavefront.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Readfirstlane) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_ReadfirstlaneU(uint src)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Readfirstlane, 0, 0);
+
+    uint retVal;
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src, 0, retVal);
+    return retVal;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Readlane
+*
+*   Returns the value of float src for the lane within the wavefront specified by laneId.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Readlane) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_ReadlaneF(float src, uint laneId)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Readlane, 0, laneId);
+
+    uint retVal;
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, asuint(src), 0, retVal);
+    return asfloat(retVal);
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_ReadlaneU
+*
+*   Returns the value of unsigned integer src for the lane within the wavefront specified by laneId.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Readlane) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_ReadlaneU(uint src, uint laneId)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Readlane, 0, laneId);
+
+    uint retVal;
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src, 0, retVal);
+    return retVal;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_LaneId
+*
+*   Returns the current lane id for the thread within the wavefront.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_LaneId) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_LaneId()
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_LaneId, 0, 0);
+
+    uint retVal;
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal);
+    return retVal;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Swizzle
+*
+*   Generic instruction to shuffle the float src value among different lanes as specified by the operation.
+*   Note that the operation parameter must be an immediately specified value not a value from a variable.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Swizzle) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_SwizzleF(float src, uint operation)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Swizzle, 0, operation);
+
+    uint retVal;
+    //InterlockedCompareExchange(AmdExtD3DShaderIntrinsicsUAV[instruction], asuint(src), 0, retVal);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, asuint(src), 0, retVal);
+    return asfloat(retVal);
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_SwizzleU
+*
+*   Generic instruction to shuffle the unsigned integer src value among different lanes as specified by the operation.
+*   Note that the operation parameter must be an immediately specified value not a value from a variable.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Swizzle) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_SwizzleU(uint src, uint operation)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Swizzle, 0, operation);
+
+    uint retVal;
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src, 0, retVal);
+    return retVal;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Ballot
+*
+*   Given an input predicate returns a bit mask indicating for which lanes the predicate is true.
+*   Inactive or non-existent lanes will always return 0.  The number of existent lanes is the wavefront size.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Ballot) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint2 AmdExtD3DShaderIntrinsics_Ballot(bool predicate)
+{
+    uint instruction;
+
+    uint retVal1;
+    instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Ballot,
+                                                     AmdExtD3DShaderIntrinsicsOpcodePhase_0, 0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, predicate, 0, retVal1);
+
+    uint retVal2;
+    instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Ballot,
+                                                     AmdExtD3DShaderIntrinsicsOpcodePhase_1, 0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, predicate, 0, retVal2);
+
+    return uint2(retVal1, retVal2);
+}
+
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_BallotAny
+*
+*   Convenience routine that uses Ballot and returns true if for any of the active lanes the predicate is true.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Ballot) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+bool AmdExtD3DShaderIntrinsics_BallotAny(bool predicate)
+{
+    uint2 retVal = AmdExtD3DShaderIntrinsics_Ballot(predicate);
+
+    return ((retVal.x | retVal.y) != 0 ? true : false);
+}
+
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_BallotAll
+*
+*   Convenience routine that uses Ballot and returns true if for all of the active lanes the predicate is true.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Ballot) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+bool AmdExtD3DShaderIntrinsics_BallotAll(bool predicate)
+{
+    uint2 ballot = AmdExtD3DShaderIntrinsics_Ballot(predicate);
+
+    uint2 execMask = AmdExtD3DShaderIntrinsics_Ballot(true);
+
+    return ((ballot.x == execMask.x) && (ballot.y == execMask.y));
+}
+
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_MBCnt
+*
+*   Returns the masked bit count of the source register for this thread within all the active threads within a
+*   wavefront.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_MBCnt) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_MBCnt(uint2 src)
+{
+    uint instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_MBCnt, 0, 0);
+
+    uint retVal;
+
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, src.x, src.y, retVal);
+
+    return retVal;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Min3F
+*
+*   Returns the minimum value of the three floating point source arguments.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_Min3F(float src0, float src1, float src2)
+{
+    uint minimum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Min3F,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, asuint(src0), asuint(src1), minimum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Min3F,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, asuint(src2), minimum, minimum);
+
+    return asfloat(minimum);
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Min3U
+*
+*   Returns the minimum value of the three unsigned integer source arguments.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_Min3U(uint src0, uint src1, uint src2)
+{
+    uint minimum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Min3U,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, src0, src1, minimum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Min3U,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, src2, minimum, minimum);
+
+    return minimum;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Med3F
+*
+*   Returns the median value of the three floating point source arguments.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_Med3F(float src0, float src1, float src2)
+{
+    uint median;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Med3F,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, asuint(src0), asuint(src1), median);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Med3F,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, asuint(src2), median, median);
+
+    return asfloat(median);
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Med3U
+*
+*   Returns the median value of the three unsigned integer source arguments.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_Med3U(uint src0, uint src1, uint src2)
+{
+    uint median;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Med3U,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, src0, src1, median);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Med3U,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, src2, median, median);
+
+    return median;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Max3F
+*
+*   Returns the maximum value of the three floating point source arguments.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_Max3F(float src0, float src1, float src2)
+{
+    uint maximum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Max3F,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, asuint(src0), asuint(src1), maximum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Max3F,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, asuint(src2), maximum, maximum);
+
+    return asfloat(maximum);
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_Max3U
+*
+*   Returns the maximum value of the three unsigned integer source arguments.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_Compare3) returned S_OK.
+*
+***********************************************************************************************************************
+*/
+uint AmdExtD3DShaderIntrinsics_Max3U(uint src0, uint src1, uint src2)
+{
+    uint maximum;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Max3U,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, src0, src1, maximum);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_Max3U,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           0);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, src2, maximum, maximum);
+
+    return maximum;
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_IjBarycentricCoords
+*
+*   Returns the (i, j) barycentric coordinate pair for this shader invocation with the specified interpolation mode at
+*   the specified pixel location.  Should not be used for "pull-model" interpolation, PullModelBarycentricCoords should
+*   be used instead
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_BaryCoord) returned S_OK.
+*
+*   Can only be used in pixel shader stages.
+*
+***********************************************************************************************************************
+*/
+float2 AmdExtD3DShaderIntrinsics_IjBarycentricCoords(uint interpMode)
+{
+    uint2 retVal;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           interpMode);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, 0, 0, retVal.x);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           interpMode);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, retVal.x, 0, retVal.y);
+
+    return float2(asfloat(retVal.x), asfloat(retVal.y));
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_PullModelBarycentricCoords
+*
+*   Returns the (1/W,1/I,1/J) coordinates at the pixel center which can be used for custom interpolation at any
+*   location in the pixel.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_BaryCoord) returned S_OK.
+*
+*   Can only be used in pixel shader stages.
+*
+***********************************************************************************************************************
+*/
+float3 AmdExtD3DShaderIntrinsics_PullModelBarycentricCoords()
+{
+    uint3 retVal;
+
+    uint instruction1 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                                           AmdExtD3DShaderIntrinsicsBarycentric_PerspPullModel);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction1, 0, 0, retVal.x);
+
+    uint instruction2 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_1,
+                                                           AmdExtD3DShaderIntrinsicsBarycentric_PerspPullModel);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction2, retVal.x, 0, retVal.y);
+
+    uint instruction3 = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_BaryCoord,
+                                                           AmdExtD3DShaderIntrinsicsOpcodePhase_2,
+                                                           AmdExtD3DShaderIntrinsicsBarycentric_PerspPullModel);
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction3, retVal.y, 0, retVal.z);
+
+    return float3(asfloat(retVal.x), asfloat(retVal.y), asfloat(retVal.z));
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_VertexParameter
+*
+*   Returns the triangle's parameter information at the specified triangle vertex.
+*   The vertex and parameter indices must specified as immediate values.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_VtxParam) returned S_OK.
+*
+*   Only available in pixel shader stages.
+*
+***********************************************************************************************************************
+*/
+float4 AmdExtD3DShaderIntrinsics_VertexParameter(uint vertexIdx, uint parameterIdx)
+{
+    uint4 retVal;
+    uint4 instruction;
+
+    instruction.x = MakeAmdShaderIntrinsicsInstruction(
+		     AmdExtD3DShaderIntrinsicsOpcode_VtxParam,
+             AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+           ((vertexIdx << AmdExtD3DShaderIntrinsicsBarycentric_VtxShift) |
+            (parameterIdx << AmdExtD3DShaderIntrinsicsBarycentric_ParamShift) |
+            (AmdExtD3DShaderIntrinsicsBarycentric_ComponentX << AmdExtD3DShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.x, 0, 0, retVal.x);
+
+    instruction.y = MakeAmdShaderIntrinsicsInstruction(
+		     AmdExtD3DShaderIntrinsicsOpcode_VtxParam,
+             AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+           ((vertexIdx << AmdExtD3DShaderIntrinsicsBarycentric_VtxShift) |
+            (parameterIdx << AmdExtD3DShaderIntrinsicsBarycentric_ParamShift) |
+            (AmdExtD3DShaderIntrinsicsBarycentric_ComponentY << AmdExtD3DShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.y, 0, 0, retVal.y);
+
+    instruction.z = MakeAmdShaderIntrinsicsInstruction(
+		     AmdExtD3DShaderIntrinsicsOpcode_VtxParam,
+             AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+           ((vertexIdx << AmdExtD3DShaderIntrinsicsBarycentric_VtxShift) |
+            (parameterIdx << AmdExtD3DShaderIntrinsicsBarycentric_ParamShift) |
+            (AmdExtD3DShaderIntrinsicsBarycentric_ComponentZ << AmdExtD3DShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.z, 0, 0, retVal.z);
+
+    instruction.w = MakeAmdShaderIntrinsicsInstruction(
+		     AmdExtD3DShaderIntrinsicsOpcode_VtxParam,
+             AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+           ((vertexIdx << AmdExtD3DShaderIntrinsicsBarycentric_VtxShift) |
+            (parameterIdx << AmdExtD3DShaderIntrinsicsBarycentric_ParamShift) |
+            (AmdExtD3DShaderIntrinsicsBarycentric_ComponentW << AmdExtD3DShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction.w, 0, 0, retVal.w);
+
+    return float4(asfloat(retVal.x), asfloat(retVal.y), asfloat(retVal.z), asfloat(retVal.w));
+}
+
+/**
+***********************************************************************************************************************
+*   AmdExtD3DShaderIntrinsics_VertexParameterComponent
+*
+*   Returns the triangle's parameter information at the specified triangle vertex and component.
+*   The vertex, parameter and component indices must be specified as immediate values.
+*
+*   Available if CheckSupport(AmdExtD3DShaderIntrinsicsSupport_VtxParam) returned S_OK.
+*
+*   Only available in pixel shader stages.
+*
+***********************************************************************************************************************
+*/
+float AmdExtD3DShaderIntrinsics_VertexParameterComponent(uint vertexIdx, uint parameterIdx, uint componentIdx)
+{
+    uint retVal;
+    uint instruction =
+		MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_VtxParam,
+                                           AmdExtD3DShaderIntrinsicsOpcodePhase_0,
+                                          ((vertexIdx << AmdExtD3DShaderIntrinsicsBarycentric_VtxShift) |
+                                           (parameterIdx << AmdExtD3DShaderIntrinsicsBarycentric_ParamShift) |
+                                           (componentIdx << AmdExtD3DShaderIntrinsicsBarycentric_ComponentShift)));
+    AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal);
+
+    return asfloat(retVal);
+}
+
+#endif // AMDEXTD3DSHADERINTRINICS_HLSL
diff --git a/external/ags_lib/inc/amd_ags.h b/external/ags_lib/inc/amd_ags.h
new file mode 100644
index 0000000..a2605d5
--- /dev/null
+++ b/external/ags_lib/inc/amd_ags.h
@@ -0,0 +1,494 @@
+//
+// Copyright (c) 2016 Advanced Micro Devices, Inc. All rights reserved.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+//
+#ifndef AMD_AGS_H
+#define AMD_AGS_H
+
+#define AMD_AGS_VERSION_MAJOR 4
+#define AMD_AGS_VERSION_MINOR 0
+#define AMD_AGS_VERSION_PATCH 3
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define AMD_AGS_API __declspec(dllexport)
+
+// Forward declaration of D3D11 types
+struct ID3D11Device;
+struct ID3D11Resource;
+struct ID3D11Buffer;
+struct ID3D11Texture1D;
+struct ID3D11Texture2D;
+struct ID3D11Texture3D;
+struct D3D11_BUFFER_DESC;
+struct D3D11_TEXTURE1D_DESC;
+struct D3D11_TEXTURE2D_DESC;
+struct D3D11_TEXTURE3D_DESC;
+struct D3D11_SUBRESOURCE_DATA;
+struct tagRECT;
+typedef tagRECT D3D11_RECT;
+
+// Forward declaration of D3D12 types
+struct ID3D12Device;
+
+
+enum AGSReturnCode
+{
+    AGS_SUCCESS,
+    AGS_INVALID_ARGS,
+    AGS_OUT_OF_MEMORY,
+    AGS_ERROR_MISSING_DLL,
+    AGS_ERROR_LEGACY_DRIVER,    // returned if driver doesn't support ADL2 (from before AMD Catalyst driver 12.20)
+    AGS_EXTENSION_NOT_SUPPORTED,
+    AGS_ADL_FAILURE,
+};
+
+enum AGSDriverExtensionDX11
+{
+    AGS_DX11_EXTENSION_QUADLIST = 1 << 0,
+    AGS_DX11_EXTENSION_SCREENRECTLIST = 1 << 1,
+    AGS_DX11_EXTENSION_UAV_OVERLAP = 1 << 2,
+    AGS_DX11_EXTENSION_DEPTH_BOUNDS_TEST = 1 << 3,
+    AGS_DX11_EXTENSION_MULTIDRAWINDIRECT = 1 << 4,
+    AGS_DX11_EXTENSION_MULTIDRAWINDIRECT_COUNTINDIRECT = 1 << 5,
+    AGS_DX11_EXTENSION_CROSSFIRE_API = 1 << 6,
+    AGS_DX11_EXTENSION_INTRINSIC_READFIRSTLANE = 1 << 7,
+    AGS_DX11_EXTENSION_INTRINSIC_READLANE = 1 << 8,
+    AGS_DX11_EXTENSION_INTRINSIC_LANEID = 1 << 9,
+    AGS_DX11_EXTENSION_INTRINSIC_SWIZZLE = 1 << 10,
+    AGS_DX11_EXTENSION_INTRINSIC_BALLOT = 1 << 11,
+    AGS_DX11_EXTENSION_INTRINSIC_MBCOUNT = 1 << 12,
+    AGS_DX11_EXTENSION_INTRINSIC_COMPARE3 = 1 << 13,
+    AGS_DX11_EXTENSION_INTRINSIC_BARYCENTRICS = 1 << 14
+};
+
+enum AGSDriverExtensionDX12
+{
+    AGS_DX12_EXTENSION_INTRINSIC_READFIRSTLANE = 1 << 0,
+    AGS_DX12_EXTENSION_INTRINSIC_READLANE = 1 << 1,
+    AGS_DX12_EXTENSION_INTRINSIC_LANEID = 1 << 2,
+    AGS_DX12_EXTENSION_INTRINSIC_SWIZZLE = 1 << 3,
+    AGS_DX12_EXTENSION_INTRINSIC_BALLOT = 1 << 4,
+    AGS_DX12_EXTENSION_INTRINSIC_MBCOUNT = 1 << 5,
+    AGS_DX12_EXTENSION_INTRINSIC_COMPARE3 = 1 << 6,
+    AGS_DX12_EXTENSION_INTRINSIC_BARYCENTRICS = 1 << 7
+};
+
+const unsigned int AGS_DX12_SHADER_INSTRINSICS_SPACE_ID = 0x7FFF0ADE; // 2147420894
+
+enum AGSPrimitiveTopology
+{
+    AGS_PRIMITIVE_TOPOLOGY_QUADLIST = 7,
+    AGS_PRIMITIVE_TOPOLOGY_SCREENRECTLIST = 9
+};
+
+enum AGSCrossfireMode
+{
+    AGS_CROSSFIRE_MODE_DRIVER_AFR = 0,  // Use the default driver-based AFR rendering
+    AGS_CROSSFIRE_MODE_EXPLICIT_AFR,    // Use the AGS Crossfire API functions to perform explicit AFR rendering
+    AGS_CROSSFIRE_MODE_DISABLE          // Completely disable AFR rendering
+};
+
+enum AGSAfrTransferType
+{
+    AGS_AFR_TRANSFER_DEFAULT                = 0, // default Crossfire driver resource tracking
+    AGS_AFR_TRANSFER_DISABLE                = 1, // turn off driver resource tracking
+    AGS_AFR_TRANSFER_1STEP_P2P              = 2, // app controlled GPU to next GPU transfer
+    AGS_AFR_TRANSFER_2STEP_NO_BROADCAST     = 3, // app controlled GPU to next GPU transfer using intermediate system memory
+    AGS_AFR_TRANSFER_2STEP_WITH_BROADCAST   = 4, // app controlled GPU to all render GPUs transfer using intermediate system memory
+};
+
+struct AGSContext;  // All function calls in AGS require a pointer to a context. This is generated via agsInit
+
+struct AGSRect
+{
+    int iXOffset;
+    int iYOffset;
+    int iWidth;
+    int iHeight;
+};
+
+struct AGSEyefinityInfo
+{
+    int iSLSActive;                 // Indicates if Eyefinity is active for the operating system display
+                                    // index passed into atiEyefinityGetConfigInfo(). 1 if enabled and 0 if disabled.
+
+    int iSLSGridWidth;              // Contains width of the multi-monitor grid that makes up the Eyefinity Single Large Surface.
+                                    // For example, a 3 display wide by 2 high Eyefinity setup will return 3 for this entry.
+    int iSLSGridHeight;             // Contains height of the multi-monitor grid that makes up the Eyefinity Single Large Surface.
+                                    // For example, a 3 display wide by 2 high Eyefinity setup will return 2 for this entry.
+
+    int iSLSWidth;                  // Contains width in pixels of the multi-monitor Single Large Surface. The value returned is
+                                    // a function of the width of the SLS grid, of the horizontal resolution of each display, and
+                                    // of whether or not bezel compensation is enabled.
+    int iSLSHeight;                 // Contains height in pixels of the multi-monitor Single Large Surface. The value returned is
+                                    // a function of the height of the SLS grid, of the vertical resolution of each display, and
+                                    // of whether or not bezel compensation is enabled.
+
+    int iBezelCompensatedDisplay;   // Indicates if bezel compensation is used for the current SLS display area.
+                                    // 1 if enabled, and 0 if disabled.
+};
+
+struct AGSDisplayInfo
+{
+    int iGridXCoord;                // Contains horizontal SLS grid coordinate of the display. The value is zero based with
+                                    // increasing values from left to right of the overall SLS grid. For example, the left-most
+                                    // display of a 3x2 Eyefinity setup will have the value 0, and the right-most will have
+                                    // the value 2.
+    int iGridYCoord;                // Contains vertical SLS grid coordinate of the display. The value is zero based with
+                                    // increasing values from top to bottom of the overall SLS grid. For example, the top
+                                    // display of a 3x2 Eyefinity setup will have the value 0, and the bottom will have the
+                                    // value 1.
+
+    AGSRect displayRect;            // Contains the base offset and dimensions in pixels of the SLS rendering
+                                    // area associated with this display. If bezel compensation is enabled, this
+                                    // area will be larger than what the display can natively present to account
+                                    // for bezel area. If bezel compensation is disabled, this area will be equal
+                                    // to what the display can support natively.
+
+    AGSRect displayRectVisible;     // Contains the base offset and dimensions in pixels of the SLS rendering area
+                                    // associated with this display that is visible to the end user. If bezel
+                                    // compensation is enabled, this area will be equal to what the display can
+                                    // natively, but smaller that the area described in the displayRect entry. If
+                                    // bezel compensation is disabled, this area will be equal to what the display
+                                    // can support natively and equal to the area described in the displayRect entry.
+                                    // Developers wishing to place UI, HUD, or other game assets on a given display
+                                    // so that it is visible and accessible to end users need to locate them inside
+                                    // of the region defined by this rect.
+
+    int iPreferredDisplay;          // Indicates whether or not this display is the preferred one for rendering of
+                                    // game HUD and UI elements. Only one display out of the whole SLS grid will have
+                                    // this be true if it is the preferred display and 0 otherwise. Developers wishing
+                                    // to place specific UI, HUD, or other game assets on a given display so that it
+                                    // is visible and accessible to end users need to locate them inside of the region
+                                    // defined by this rect.
+};
+
+struct AGSConfiguration
+{
+    AGSCrossfireMode        crossfireMode;                  // Desired Crossfire mode. See AGSCrossfireMode for more details
+};
+
+struct AGSGPUInfo
+{
+    enum ArchitectureVersion
+    {
+        ArchitectureVersion_Unknown,
+        ArchitectureVersion_PreGCN,
+        ArchitectureVersion_GCN
+    };
+
+    int                     agsVersionMajor;                // Major field of Major.Minor.Patch AGS version number
+    int                     agsVersionMinor;                // Minor field of Major.Minor.Patch AGS version number
+    int                     agsVersionPatch;                // Patch field of Major.Minor.Patch AGS version number
+
+    ArchitectureVersion     architectureVersion;            // Set to Unknown if not AMD hardware
+    const char*             adapterString;                  // The adapter name string. NULL if not AMD hardware
+    int                     deviceId;                       // The device id
+    int                     revisionId;                     // The revision id
+
+    const char*             driverVersion;                  // The driver package version
+    const char*             radeonSoftwareVersion;          // The Radeon Software Version
+
+    int                     iNumCUs;                        // Number of GCN compute units. Zero if not GCN
+    int                     iCoreClock;                     // core clock speed at 100% power in MHz
+    int                     iMemoryClock;                   // memory clock speed at 100% power in MHz
+    float                   fTFlops;                        // Teraflops of GPU. Zero if not GCN. Calculated from iCoreClock * iNumCUs * 64 Pixels/clk * 2 instructions/MAD
+};
+
+// Description
+//   Function used to initialize the AGS library.
+//   Must be called prior to any of the subsequent AGS API calls.
+//   Must be called prior to ID3D11Device or ID3D12Device creation.
+//
+// Input params
+//   context - Address of a pointer to a context. This function allocates a context on the heap which is then required for all subsequent API calls.
+//   config  - Optional pointer to a AGSConfiguration struct to override the default library configuration.
+//   gpuInfo - Optional pointer to a AGSGPUInfo struct which will get filled in for the primary adapter.
+//
+AMD_AGS_API AGSReturnCode agsInit( AGSContext** context, const AGSConfiguration* config, AGSGPUInfo* gpuInfo );
+
+// Description
+//   Function used to clean up the AGS library.
+//
+// Input params
+//   context - Pointer to a context. This function will deallocate the context from the heap.
+//
+AMD_AGS_API AGSReturnCode agsDeInit( AGSContext* context );
+
+// Description
+//   Function used to query the number of GPUs used for Crossfire acceleration.
+//   This may be different from the total number of GPUs present in the system
+//   which you can query using agsGetTotalGPUCount which reports all GPUs,
+//   even if they are not configured for Crossfire.
+//
+// Input params
+//   context - Pointer to a context.
+//
+// Output params
+//   numGPUs - Number of GPUs used for Crossfire acceleration
+//
+AMD_AGS_API AGSReturnCode agsGetCrossfireGPUCount( AGSContext* context, int* numGPUs );
+
+// Description
+//   Function used to query the number of GPUs in the system.
+//   This number may be different from agsGetCrossfireGPUCount as it reports
+//   all devices installed in the system, and not only those configured for
+//   Crossfire.
+//
+// Input params
+//   context - Pointer to a context.
+//
+// Output params
+//   numGPUs - Number of GPUs in the system.
+//
+AMD_AGS_API AGSReturnCode agsGetTotalGPUCount( AGSContext* context, int* numGPUs );
+
+// Description
+//   Function used to query the memory size of a GPU. The number of GPUs should
+//   be obtained using agsGetTotalGPUCount
+//
+// Input params
+//   context - Pointer to a context.
+//   gpuIndex - The GPU index to query
+//
+// Output params
+//   sizeInBytes - Memory size on the device in bytes
+//
+AMD_AGS_API AGSReturnCode agsGetGPUMemorySize( AGSContext* context, int gpuIndex, long long* sizeInBytes );
+
+// Description
+//   Function used to query Eyefinity configuration state information relevant to ISVs. State info returned
+//   includes: whether Eyefinity is enabled or not, SLS grid configuration, SLS dimensions, whether bezel
+//   compensation is enabled or not, SLS grid coordinate for each display, total rendering area for each
+//   display, visible rendering area for each display, and a preferred display flag.
+//
+//   This function needs to be called twice. Firstly to null into eyefinityInfo and displaysInfo. This will
+//   return the number of AGSDisplayInfo objects to allocate.
+//   Second call requires valid pointers to eyefinityInfo and the newly allocated displaysInfo array. It is the
+//   responsibility of the caller to free this memory.
+//
+//
+// Input params
+//   context -         Pointer to a context.
+//   displayIndex -    Operating system specific display index identifier. The value used should be the
+//                     index of the display used for rendering operations. On Windows operating systems,
+//                     the value can be queried using the EnumDisplayDevices() API.
+//
+// Output params
+//   eyefinityInfo -   This is a pointer to an AGSEyefinityInfo structure that contains system Eyefinity
+//                     configuration information.
+//   numDisplaysInfo - Pointer to the number of AGSDisplayInfo structures stored in the returned
+//                     displaysInfo array. The value returned is equal to the number of displays
+//                     used for the Eyefinity setup.
+//   displaysInfo -    Pointer to an array of AGSDisplayInfo structures that contains per display
+//                     Eyefinity configuration information.
+//
+AMD_AGS_API AGSReturnCode agsGetEyefinityConfigInfo( AGSContext* context, int displayIndex, AGSEyefinityInfo* eyefinityInfo, int* numDisplaysInfo, AGSDisplayInfo* displaysInfo );
+
+
+// Description
+//   Function used to initialize the AMD-specific driver extensions for D3D12
+//
+// Input params
+//   context -             Pointer to a context. This is generated by agsInit()
+//   device -              The D3D12 device.
+//   extensionsSupported - Pointer to a bit mask that this function will fill in to indicate which extensions are supported.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX12_Init( AGSContext* context, ID3D12Device* device, unsigned int* extensionsSupported );
+
+// Description
+//   Function used to cleanup any AMD-specific driver extensions for D3D12
+//
+// Input params
+//   context -             Pointer to a context.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX12_DeInit( AGSContext* context );
+
+
+// Description
+//   Function used to initialize the AMD-specific driver extensions for D3D11
+//
+// Input params
+//   context -             Pointer to a context. This is generated by agsInit()
+//   device -              The D3D11 device.
+//   uavSlot -             The UAV slot reserved for intrinsic support. This must match the slot defined in the HLSL, ie #define AmdDxExtShaderIntrinsicsUAVSlot.
+//                         The default slot is 7, but the caller is free to use an alternative slot.
+//   extensionsSupported - Pointer to a bit mask that this function will fill in to indicate which extensions are supported.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_Init( AGSContext* context, ID3D11Device* device, unsigned int uavSlot, unsigned int* extensionsSupported );
+
+// Description
+//   Function used to cleanup any AMD-specific driver extensions for D3D11
+//
+// Input params
+//   context -             Pointer to a context.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_DeInit( AGSContext* context );
+
+// Description
+//   Function used to set the primitive topology. If you are using any of the extended topology types, then this function should
+//   be called to set ALL topology types.
+//
+// Input params
+//   context -             Pointer to a context.
+//   topology -            The topology to set on the D3D11 device. This can be either an AGS-defined topology such as AGS_PRIMITIVE_TOPOLOGY_QUAD_LIST
+//                         or a standard D3D-defined topology such as D3D_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP.
+//                         NB. the AGS-defined types will require casting to a D3D_PRIMITIVE_TOPOLOGY type.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_IASetPrimitiveTopology( AGSContext* context, enum D3D_PRIMITIVE_TOPOLOGY topology );
+
+// Description
+//   Function used indicate to the driver it can overlap the subsequent batch of back-to-back dispatches
+//
+// Input params
+//   context -             Pointer to a context.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_BeginUAVOverlap( AGSContext* context );
+
+// Description
+//   Function used indicate to the driver it can no longer overlap the batch of back-to-back dispatches that has been submitted
+//
+// Input params
+//   context -             Pointer to a context.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_EndUAVOverlap( AGSContext* context );
+
+// Description
+//   Function used to set the depth bounds test extension
+//
+// Input params
+//   context -  Pointer to a context.
+//   enabled -  Whether to enable or disable the depth bounds testing. If disabled, the next two args are ignored.
+//   minDepth - The near depth range to clip against.
+//   maxDepth - The far depth range to clip against.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_SetDepthBounds( AGSContext* context, bool enabled, float minDepth, float maxDepth );
+
+// Description
+//   Function used to submit a batch of draws via MultiDrawIndirect
+//
+// Input params
+//   context -                      Pointer to a context.
+//   drawCount -                    The number of draws.
+//   pBufferForArgs -               The args buffer.
+//   alignedByteOffsetForArgs -     The offset into the args buffer.
+//   byteStrideForArgs -            The per element stride of the args buffer.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_MultiDrawInstancedIndirect( AGSContext* context, unsigned int drawCount, ID3D11Buffer* pBufferForArgs, unsigned int alignedByteOffsetForArgs, unsigned int byteStrideForArgs );
+
+// Description
+//   Function used to submit a batch of draws via MultiDrawIndirect
+//
+// Input params
+//   context -                      Pointer to a context.
+//   drawCount -                    The number of draws.
+//   pBufferForArgs -               The args buffer.
+//   alignedByteOffsetForArgs -     The offset into the args buffer.
+//   byteStrideForArgs -            The per element stride of the args buffer.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_MultiDrawIndexedInstancedIndirect( AGSContext* context, unsigned int drawCount, ID3D11Buffer* pBufferForArgs, unsigned int alignedByteOffsetForArgs, unsigned int byteStrideForArgs );
+
+// Description
+//   Function used to submit a batch of draws via MultiDrawIndirect
+//
+// Input params
+//   context -                          Pointer to a context.
+//   pBufferForDrawCount -              The draw count buffer.
+//   alignedByteOffsetForDrawCount -    The offset into the draw count buffer.
+//   pBufferForArgs -                   The args buffer.
+//   alignedByteOffsetForArgs -         The offset into the args buffer.
+//   byteStrideForArgs -                The per element stride of the args buffer.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_MultiDrawInstancedIndirectCountIndirect( AGSContext* context, ID3D11Buffer* pBufferForDrawCount, unsigned int alignedByteOffsetForDrawCount, ID3D11Buffer* pBufferForArgs, unsigned int alignedByteOffsetForArgs, unsigned int byteStrideForArgs );
+
+// Description
+//   Function used to submit a batch of draws via MultiDrawIndirect
+//
+// Input params
+//   context -                          Pointer to a context.
+//   pBufferForDrawCount -              The draw count buffer.
+//   alignedByteOffsetForDrawCount -    The offset into the draw count buffer.
+//   pBufferForArgs -                   The args buffer.
+//   alignedByteOffsetForArgs -         The offset into the args buffer.
+//   byteStrideForArgs -                The per element stride of the args buffer.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_MultiDrawIndexedInstancedIndirectCountIndirect( AGSContext* context, ID3D11Buffer* pBufferForDrawCount, unsigned int alignedByteOffsetForDrawCount, ID3D11Buffer* pBufferForArgs, unsigned int alignedByteOffsetForArgs, unsigned int byteStrideForArgs );
+
+// Description
+//   Functions to create a Direct3D11 resource with the specified AFR transfer type
+//
+// Input params
+//   context -             Pointer to a context.
+//   desc -                Pointer to the D3D11 resource description.
+//   initialData -         Optional pointer to the initializing data for the resource.
+//   transferType -        The transfer behavior. See AGSAfrTransferType for more details.
+//
+// Output params
+//   buffer/texture -      Returned pointer to the resource.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_CreateBuffer( AGSContext* context, const D3D11_BUFFER_DESC* desc, const D3D11_SUBRESOURCE_DATA* initialData, ID3D11Buffer** buffer, AGSAfrTransferType transferType );
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_CreateTexture1D( AGSContext* context, const D3D11_TEXTURE1D_DESC* desc, const D3D11_SUBRESOURCE_DATA* initialData, ID3D11Texture1D** texture1D, AGSAfrTransferType transferType );
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_CreateTexture2D( AGSContext* context, const D3D11_TEXTURE2D_DESC* desc, const D3D11_SUBRESOURCE_DATA* initialData, ID3D11Texture2D** texture2D, AGSAfrTransferType transferType );
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_CreateTexture3D( AGSContext* context, const D3D11_TEXTURE3D_DESC* desc, const D3D11_SUBRESOURCE_DATA* initialData, ID3D11Texture3D** texture3D, AGSAfrTransferType transferType );
+
+// Description
+//   Functions to notify the driver that we have finished writing to the resource this frame.
+//      This will initiate a transfer for AGS_AFR_TRANSFER_1STEP_P2P,
+//      AGS_AFR_TRANSFER_2STEP_NO_BROADCAST, and AGS_AFR_TRANSFER_2STEP_WITH_BROADCAST.
+//
+// Input params
+//   context -             Pointer to a context.
+//   resource -            Pointer to the resource.
+//   transferRegions -     An array of transfer regions (can be null to specify the whole area).
+//   subresourceArray -    An array of subresource indices (can be null to specify all subresources).
+//   numSubresources -     The number of subresources in subresourceArray OR number of transferRegions. Use 0 to specify ALL subresources and one transferRegion (which may be null if specifying the whole area).
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_NotifyResourceEndWrites( AGSContext* context, ID3D11Resource* resource, const D3D11_RECT* transferRegions, const unsigned int* subresourceArray, unsigned int numSubresources );
+
+// Description
+//   This will notify the driver that the app will begin read/write access to the resource.
+//
+// Input params
+//   context -             Pointer to a context.
+//   resource -            Pointer to the resource.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_NotifyResourceBeginAllAccess( AGSContext* context, ID3D11Resource* resource );
+
+// Description
+//   This is used for AGS_AFR_TRANSFER_1STEP_P2P to notify when it is safe to initiate a transfer.
+//   This call in frame N-(NumGpus-1) allows a 1 step P2P in frame N to start.
+//   This should be called after agsDriverExtensionsDX11_NotifyResourceEndWrites.
+//
+// Input params
+//   context -             Pointer to a context.
+//   resource -            Pointer to the resource.
+//
+AMD_AGS_API AGSReturnCode agsDriverExtensionsDX11_NotifyResourceEndAllAccess( AGSContext* context, ID3D11Resource* resource );
+
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif // AMD_AGS_H
diff --git a/external/ags_lib/lib/amd_ags_x64.dll b/external/ags_lib/lib/amd_ags_x64.dll
new file mode 100644
index 0000000..f2cfec4
--- /dev/null
+++ b/external/ags_lib/lib/amd_ags_x64.dll
diff --git a/external/ags_lib/lib/amd_ags_x64.lib b/external/ags_lib/lib/amd_ags_x64.lib
new file mode 100644
index 0000000..7af8789
--- /dev/null
+++ b/external/ags_lib/lib/amd_ags_x64.lib
diff --git a/external/ags_lib/lib/amd_ags_x86.dll b/external/ags_lib/lib/amd_ags_x86.dll
new file mode 100644
index 0000000..6359d64
--- /dev/null
+++ b/external/ags_lib/lib/amd_ags_x86.dll
diff --git a/external/ags_lib/lib/amd_ags_x86.lib b/external/ags_lib/lib/amd_ags_x86.lib
new file mode 100644
index 0000000..72985ef
--- /dev/null
+++ b/external/ags_lib/lib/amd_ags_x86.lib