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-rw-r--r--src/boot/be/ra.ml3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/boot/be/ra.ml b/src/boot/be/ra.ml
index db70b21d..eb78ae2e 100644
--- a/src/boot/be/ra.ml
+++ b/src/boot/be/ra.ml
@@ -434,7 +434,8 @@ let reg_alloc
then
begin
Hashtbl.remove dirty_vregs vreg;
- if (Bits.get (live_out_vregs.(i)) vreg)
+ if (Bits.get (live_out_vregs.(i)) vreg) ||
+ (Bits.get (live_in_vregs.(i)) vreg)
then
let spill_idx =
if Hashtbl.mem vreg_to_spill vreg