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| author | Graydon Hoare <[email protected]> | 2010-07-02 22:44:21 -0700 |
|---|---|---|
| committer | Graydon Hoare <[email protected]> | 2010-07-02 22:44:21 -0700 |
| commit | cf19c5132a074195b61c3a09b9b61f99840744df (patch) | |
| tree | 08c6d249528cc019f2dfabea2f67fda4875c2069 /src/boot | |
| parent | Clarify manual's explanation of unwinding during failure. Add bit about soft... (diff) | |
| download | rust-cf19c5132a074195b61c3a09b9b61f99840744df.tar.xz rust-cf19c5132a074195b61c3a09b9b61f99840744df.zip | |
Hey, what's a coding sprint without an uncovered register allocation bug? No fun, I say.
Diffstat (limited to 'src/boot')
| -rw-r--r-- | src/boot/be/ra.ml | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/boot/be/ra.ml b/src/boot/be/ra.ml index db70b21d..eb78ae2e 100644 --- a/src/boot/be/ra.ml +++ b/src/boot/be/ra.ml @@ -434,7 +434,8 @@ let reg_alloc then begin Hashtbl.remove dirty_vregs vreg; - if (Bits.get (live_out_vregs.(i)) vreg) + if (Bits.get (live_out_vregs.(i)) vreg) || + (Bits.get (live_in_vregs.(i)) vreg) then let spill_idx = if Hashtbl.mem vreg_to_spill vreg |