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| author | Graydon Hoare <[email protected]> | 2010-08-10 16:03:58 -0700 |
|---|---|---|
| committer | Graydon Hoare <[email protected]> | 2010-08-10 16:03:58 -0700 |
| commit | 9f6dec9e13f17bb8a42521f6884a09eebeb023cb (patch) | |
| tree | 51ba27c76d0d129b4103b46282e8e3d252509a77 /src/boot/be | |
| parent | Merge commit 'tohava/master' (diff) | |
| download | rust-9f6dec9e13f17bb8a42521f6884a09eebeb023cb.tar.xz rust-9f6dec9e13f17bb8a42521f6884a09eebeb023cb.zip | |
Always bounce mul/div/mod ops. Closes #131 harder.
Diffstat (limited to 'src/boot/be')
| -rw-r--r-- | src/boot/be/x86.ml | 29 |
1 files changed, 6 insertions, 23 deletions
diff --git a/src/boot/be/x86.ml b/src/boot/be/x86.ml index 826127a0..71f9cdcf 100644 --- a/src/boot/be/x86.ml +++ b/src/boot/be/x86.ml @@ -303,7 +303,7 @@ let emit_target_specific let dst_eax = hr_like_cell eax dst in let lhs_eax = hr_like_op eax lhs in let rhs_ecx = hr_like_op ecx rhs in - (* Horrible: we bounce complex mul inputs off spill slots + (* Horrible: we bounce mul/div/mod inputs off spill slots * to ensure non-interference between the temporaries used * during mem-base-reg reloads and the registers we're * preparing. *) @@ -311,32 +311,15 @@ let emit_target_specific Il.Mem (Il.next_spill_slot e (Il.ScalarTy (Il.operand_scalar_ty op))) in - let is_mem op = - match op with - Il.Cell (Il.Mem _) -> true - | _ -> false - in - let bounce_lhs = is_mem lhs in - let bounce_rhs = is_mem rhs in let lhs_spill = next_spill_like lhs in let rhs_spill = next_spill_like rhs in - if bounce_lhs - then mov lhs_spill lhs; - - if bounce_rhs - then mov rhs_spill rhs; + mov lhs_spill lhs; + mov rhs_spill rhs; - mov lhs_eax - (if bounce_lhs - then (Il.Cell lhs_spill) - else lhs); + mov lhs_eax (Il.Cell lhs_spill); + mov rhs_ecx (Il.Cell rhs_spill); - mov rhs_ecx - (if bounce_rhs - then (Il.Cell rhs_spill) - else rhs); - put (Il.Binary { b with Il.binary_lhs = (Il.Cell lhs_eax); @@ -344,7 +327,7 @@ let emit_target_specific Il.binary_dst = dst_eax; }); if dst <> dst_eax then mov dst (Il.Cell dst_eax); - + | _ when (Il.Cell dst) <> lhs -> mov dst lhs; put (Il.Binary |