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-rw-r--r--homework_2/SRC/scoreboard.sv114
1 files changed, 61 insertions, 53 deletions
diff --git a/homework_2/SRC/scoreboard.sv b/homework_2/SRC/scoreboard.sv
index c442f57..a55c812 100644
--- a/homework_2/SRC/scoreboard.sv
+++ b/homework_2/SRC/scoreboard.sv
@@ -1,53 +1,61 @@
-// the design routes packets based on an address range, the
-// scoreboard checks that the packet's address is within valid
-// range.
-class scoreboard extends uvm_scoreboard;
- `uvm_component_utils(scoreboard)
- function new(string name="scoreboard", uvm_component parent=null);
- super.new(name, parent);
- endfunction
-`define LENGTH 4
- bit[`LENGTH-1:0] ref_pattern;
- bit[`LENGTH-1:0] act_pattern;
- bit exp_out;
-
- uvm_analysis_imp #(Item, scoreboard) m_analysis_imp;
-
- virtual function void build_phase(uvm_phase phase);
- super.build_phase(phase);
-
- m_analysis_imp = new("m_analysis_imp", this);
- if (!uvm_config_db#(bit[`LENGTH-1:0])::get(this, "*", "ref_pattern", ref_pattern))
- `uvm_fatal("SCBD", "Did not get ref_pattern !")
- endfunction
-
- virtual function write(Item item);
- act_pattern = act_pattern << 1 | item.in;
-
- `uvm_info("SCBD", $sformatf("in=%0d out=%0d ref=0b%0b act=0b%0b",
- item.in, item.out, ref_pattern, act_pattern), UVM_LOW)
-
- // Always check that expected out value is the actual observed value
- // Since it takes 1 clock for out to be updated after pattern match,
- // do the check first and then update exp_out value
- if (item.out != exp_out) begin
- `uvm_error("SCBD", $sformatf("ERROR ! out=%0d exp=%0d",
- item.out, exp_out))
- end else begin
- `uvm_info("SCBD", $sformatf("PASS ! out=%0d exp=%0d",
- item.out, exp_out), UVM_HIGH)
- end
-
- // If current index has reached the full pattern, then set exp_out to be 1
- // which will be checked in the next clock. If pattern is not complete, keep
- // exp_out to zero
- if (!(ref_pattern ^ act_pattern)) begin
- `uvm_info("SCBD", $sformatf("Pattern found to match, next out should be 1"), UVM_LOW)
- exp_out = 1;
- end else begin
- exp_out = 0;
- end
-
- endfunction
-endclass
- \ No newline at end of file
+// the design checks two valid sequence patterns and compares
+// expected output to monitored output in each cycle.
+class scoreboard extends uvm_scoreboard;
+ `uvm_component_utils(scoreboard)
+ function new(string name = "scoreboard", uvm_component parent = null);
+ super.new(name, parent);
+ endfunction
+
+ `define LENGTH 4
+ bit [`LENGTH-1:0] act_pattern;
+ bit exp_out;
+ bit seen_1011;
+ bit seen_1100;
+
+ uvm_analysis_imp #(Item, scoreboard) m_analysis_imp;
+
+ virtual function void build_phase(uvm_phase phase);
+ super.build_phase(phase);
+
+ m_analysis_imp = new("m_analysis_imp", this);
+ act_pattern = '0;
+ exp_out = 0;
+ seen_1011 = 0;
+ seen_1100 = 0;
+ endfunction
+
+ virtual function write(Item item);
+ act_pattern = act_pattern << 1 | item.inp;
+ exp_out = ((act_pattern == 4'b1011) || (act_pattern == 4'b1100));
+
+ `uvm_info("SCBD", $sformatf("inp=%0d outp=%0d act=0b%0b", item.inp, item.outp, act_pattern),
+ UVM_LOW)
+
+ if (act_pattern == 4'b1011) begin
+ seen_1011 = 1;
+
+ `uvm_info("SCBD", $sformatf("Pattern found to match"), UVM_LOW)
+ end
+
+ if (act_pattern == 4'b1100) begin
+ seen_1100 = 1;
+
+ `uvm_info("SCBD", $sformatf("Pattern found to match"), UVM_LOW)
+ end
+
+ if (item.outp != exp_out) begin
+ `uvm_error("SCBD", $sformatf("ERROR ! out=%0d exp=%0d", item.outp, exp_out))
+ end else if (exp_out) begin
+ `uvm_info("SCBD", $sformatf("PASS ! out=%0d exp=%0d", item.outp, exp_out), UVM_LOW)
+ end
+ endfunction
+
+ virtual function void report_phase(uvm_phase phase);
+ super.report_phase(phase);
+
+ if (!seen_1011 || !seen_1100)
+ `uvm_error(
+ "SCBD", $sformatf(
+ "Both patterns were not observed (seen_1011=%0d seen_1100=%0d)", seen_1011, seen_1100))
+ endfunction
+endclass