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diff --git a/homework_1/CST456 Embedded System Testing-HW1.md b/homework_1/CST456 Embedded System Testing-HW1.md new file mode 100644 index 0000000..2d1f8f7 --- /dev/null +++ b/homework_1/CST456 Embedded System Testing-HW1.md @@ -0,0 +1,47 @@ +# CST456 Embedded System Testing-HW1 + +**CST456 Embedded System Testing** + +**Homework 1** + +We wish to design a one-input one-output sequence detector (Mealy Machine) that produces an output value 1 every time the sequences 1100 or 1011 is detected and an output value 0 at all other times. Overlapping sequences are accepted; for example, if the input sequence is **11110000101101100** then the corresponding output sequence is **00000100000100101**. a)Draw a state diagram (State diagram must have the minimum number of states). + +b)Write a SystemVerilog code **(duv.sv)** to implement it. + +c)Write a simple SytemVerilog testbench **(tb.sv)** to test it. + +*Design must have an active high reset. The design should be asynchronous. Time step, current state, reset, input, and output must be printed in the **cmd** command window.* + +**Note:** In your simulation use **Vivado** in command line mode. But first create a directory as HW1 and create two more directories under HW1: SRC and SIM. Put your tb.sv and duv.sv codes under SRC directory. + +Create a new file and name it as *xsim_cfg.tcl* with the following content: log_wave -recursive * + +run all + +exit + +and save it under SIM directory. + +Now open up a command prompt (cmd) and change the directory to SIM. In cmd, under SIM directory run the following commands: + +*call C:\Xilinx\Vivado\2023.2\bin\xvlog --sv ../SRC/duv.sv ../SRC/tb.sv* + +*call C:\Xilinx\Vivado\2023.2\bin\xelab -debug typical -top tb -snapshot duv_tb_snapshot call C:\Xilinx\Vivado\2023.2\bin\xsim duv_tb_snapshot -R* + +*call C:\Xilinx\Vivado\2023.2\bin\xsim duv_tb_snapshot --tclbatch xsim_cfg.tcl* + +*call C:\Xilinx\Vivado\2023.2\bin\xsim --gui duv_tb_snapshot.wdb* + +We also want to check the code coverage of our design for that purpose run the following + +commands in cmd under SIM directory: + +*call C:\Xilinx\Vivado\2023.2\bin\xelab -svlog ../SRC/duv.sv -svlog ../SRC/tb.sv -cc_type sbct* + +- *cc_db DB1 -cc_dir ./cRun1 -R* + +*call C:\Xilinx\Vivado\2023.2\bin\xcrg -cc_db DB1 -cc_dir ./cRun1 -cc_report ./cReport1* + +You can find the coverage report in *./cReport1/dashboard.html* + +Submit your state diagram and HW1 directory. |