feat(homework_2): Add implementation

1 files changed, 35 insertions, 36 deletions

diff --git a/homework_2/SRC/tb.sv b/homework_2/SRC/tb.sv
index fd98597..40ecafc 100644
--- a/homework_2/SRC/tb.sv
+++ b/homework_2/SRC/tb.sv
@@ -1,36 +1,35 @@
-`include "uvm_macros.svh"

-import uvm_pkg::*;

-

-`include "interface.sv"

-`include "item.sv"

-`include "gen_item_seq.sv"

-`include "monitor.sv"

-`include "scoreboard.sv"

-`include "driver.sv"

-`include "agent.sv"

-`include "env.sv"

-`include "base_test.sv"

-

-

-

-`define LENGTH 4

-

-module tb;

-  reg clk;

-  

-  always #10 clk =~ clk;

-  des_if _if (clk);

-	

-	duv u0 	( .clk(clk),

-                     .rstn(_if.rstn),

-                     .in(_if.in),

-                     .out(_if.out));

-  

-  

-  initial begin

-    clk <= 0;

-    uvm_config_db#(virtual des_if)::set(null, "uvm_test_top", "des_vif", _if);

-    run_test("test_1011");

-  end

-  endmodule

-

+`include "uvm_macros.svh"
+import uvm_pkg::*;
+
+`include "interface.sv"
+`include "item.sv"
+`include "gen_item_seq.sv"
+`include "monitor.sv"
+`include "scoreboard.sv"
+`include "driver.sv"
+`include "agent.sv"
+`include "env.sv"
+`include "base_test.sv"
+
+module tb;
+  reg clk;
+
+  always #10 clk = ~clk;
+
+  des_if _if (clk);
+
+  duv u0 (
+      .clk  (clk),
+      .reset(_if.reset),
+      .inp  (_if.inp),
+      .outp (_if.outp)
+  );
+
+  initial begin
+    clk <= 0;
+
+    uvm_config_db#(virtual des_if)::set(null, "uvm_test_top", "des_vif", _if);
+
+    run_test("test_both_patterns");
+  end
+endmodule