// This code contains NVIDIA Confidential Information and is disclosed to you // under a form of NVIDIA software license agreement provided separately to you. // // Notice // NVIDIA Corporation and its licensors retain all intellectual property and // proprietary rights in and to this software and related documentation and // any modifications thereto. Any use, reproduction, disclosure, or // distribution of this software and related documentation without an express // license agreement from NVIDIA Corporation is strictly prohibited. // // ALL NVIDIA DESIGN SPECIFICATIONS, CODE ARE PROVIDED "AS IS.". NVIDIA MAKES // NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO // THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT, // MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE. // // Information and code furnished is believed to be accurate and reliable. // However, NVIDIA Corporation assumes no responsibility for the consequences of use of such // information or for any infringement of patents or other rights of third parties that may // result from its use. No license is granted by implication or otherwise under any patent // or patent rights of NVIDIA Corporation. Details are subject to change without notice. // This code supersedes and replaces all information previously supplied. // NVIDIA Corporation products are not authorized for use as critical // components in life support devices or systems without express written approval of // NVIDIA Corporation. // // Copyright (c) 2008-2017 NVIDIA Corporation. All rights reserved. // Copyright (c) 2004-2008 AGEIA Technologies, Inc. All rights reserved. // Copyright (c) 2001-2004 NovodeX AG. All rights reserved. #ifndef GU_EDGECACHE_H #define GU_EDGECACHE_H #include "foundation/PxMemory.h" #include "CmPhysXCommon.h" #include "PsHash.h" namespace physx { namespace Gu { class EdgeCache { #define NUM_EDGES_IN_CACHE 64 //must be power of 2. 32 lines result in 10% extra work (due to cache misses), 64 lines in 6% extra work, 128 lines in 4%. public: EdgeCache() { PxMemZero(cacheLines, NUM_EDGES_IN_CACHE*sizeof(CacheLine)); } PxU32 hash(PxU32 key) const { return (NUM_EDGES_IN_CACHE - 1) & Ps::hash(key); //Only a 16 bit hash would be needed here. } bool isInCache(PxU8 vertex0, PxU8 vertex1) { PX_ASSERT(vertex1 >= vertex0); PxU16 key = PxU16((vertex0 << 8) | vertex1); PxU32 h = hash(key); CacheLine& cl = cacheLines[h]; if (cl.fullKey == key) { return true; } else //cache the line now as it's about to be processed { cl.fullKey = key; return false; } } private: struct CacheLine { PxU16 fullKey; }; CacheLine cacheLines[NUM_EDGES_IN_CACHE]; #undef NUM_EDGES_IN_CACHE }; } } #endif