From 3dfe2108cfab31ba3ee5527e217d0d8e99a51162 Mon Sep 17 00:00:00 2001 From: git perforce import user Date: Tue, 25 Oct 2016 12:29:14 -0600 Subject: Initial commit: PhysX 3.4.0 Update @ 21294896 APEX 1.4.0 Update @ 21275617 [CL 21300167] --- .../files/PxCudaMemoryManager_8h-source.html | 249 +++++++++++++++++++++ 1 file changed, 249 insertions(+) create mode 100644 PhysX_3.4/Documentation/PhysXAPI/files/PxCudaMemoryManager_8h-source.html (limited to 'PhysX_3.4/Documentation/PhysXAPI/files/PxCudaMemoryManager_8h-source.html') diff --git a/PhysX_3.4/Documentation/PhysXAPI/files/PxCudaMemoryManager_8h-source.html b/PhysX_3.4/Documentation/PhysXAPI/files/PxCudaMemoryManager_8h-source.html new file mode 100644 index 00000000..cf4aaf4a --- /dev/null +++ b/PhysX_3.4/Documentation/PhysXAPI/files/PxCudaMemoryManager_8h-source.html @@ -0,0 +1,249 @@ + + + NVIDIA(R) PhysX(R) SDK 3.4 API Reference: PxCudaMemoryManager.h Source File + + + + + + + +

PxCudaMemoryManager.h

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00001 // This code contains NVIDIA Confidential Information and is disclosed to you
+00002 // under a form of NVIDIA software license agreement provided separately to you.
+00003 //
+00004 // Notice
+00005 // NVIDIA Corporation and its licensors retain all intellectual property and
+00006 // proprietary rights in and to this software and related documentation and
+00007 // any modifications thereto. Any use, reproduction, disclosure, or
+00008 // distribution of this software and related documentation without an express
+00009 // license agreement from NVIDIA Corporation is strictly prohibited.
+00010 //
+00011 // ALL NVIDIA DESIGN SPECIFICATIONS, CODE ARE PROVIDED "AS IS.". NVIDIA MAKES
+00012 // NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO
+00013 // THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT,
+00014 // MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE.
+00015 //
+00016 // Information and code furnished is believed to be accurate and reliable.
+00017 // However, NVIDIA Corporation assumes no responsibility for the consequences of use of such
+00018 // information or for any infringement of patents or other rights of third parties that may
+00019 // result from its use. No license is granted by implication or otherwise under any patent
+00020 // or patent rights of NVIDIA Corporation. Details are subject to change without notice.
+00021 // This code supersedes and replaces all information previously supplied.
+00022 // NVIDIA Corporation products are not authorized for use as critical
+00023 // components in life support devices or systems without express written approval of
+00024 // NVIDIA Corporation.
+00025 //
+00026 // Copyright (c) 2008-2016 NVIDIA Corporation. All rights reserved.
+00027 
+00028 #ifndef PXCUDACONTEXTMANAGER_PXCUDAMEMORYMANAGER_H
+00029 #define PXCUDACONTEXTMANAGER_PXCUDAMEMORYMANAGER_H
+00030 
+00031 #include "foundation/PxPreprocessor.h"
+00032 
+00033 #if PX_SUPPORT_GPU_PHYSX
+00034 
+00035 #include "task/PxTaskDefine.h"
+00036 
+00037 // some macros to keep the source code more readable
+00038 #define PX_ALLOC_INFO(name, ID) __FILE__, __LINE__, name, physx::PxAllocId::ID
+00039 #define PX_ALLOC_INFO_PARAMS_DECL(p0, p1, p2, p3)  const char* file = p0, int line = p1, const char* allocName = p2, physx::PxAllocId::Enum allocId = physx::PxAllocId::p3
+00040 #define PX_ALLOC_INFO_PARAMS_DEF()  const char* file, int line, const char* allocName, physx::PxAllocId::Enum allocId
+00041 #define PX_ALLOC_INFO_PARAMS_INPUT()  file, line, allocName, allocId
+00042 #define PX_ALLOC_INFO_PARAMS_INPUT_INFO(info) info.getFileName(), info.getLine(), info.getAllocName(), info.getAllocId()
+00043 
+00044 #ifndef NULL // don't want to include <string.h>
+00045 #define NULL 0
+00046 #endif
+00047 
+00048 namespace physx
+00049 {
+00050 
+00051 PX_PUSH_PACK_DEFAULT
+00052 
+00057 struct PxAllocId
+00058 {
+00062     enum Enum
+00063     {
+00064         UNASSIGNED,     
+00065         APEX,           
+00066         PARTICLES,      
+00067         GPU_UTIL,       
+00068         CLOTH,          
+00069         NUM_IDS         
+00070     };
+00071 };
+00072 
+00074 struct PxCudaBufferMemorySpace
+00075 {
+00079     enum Enum
+00080     {
+00081         T_GPU,
+00082         T_PINNED_HOST,
+00083         T_WRITE_COMBINED,
+00084         T_HOST,
+00085         COUNT
+00086     };
+00087 };
+00088 
+00090 class PxAllocInfo
+00091 {
+00092 public:
+00096     PxAllocInfo() {}
+00097 
+00101     PxAllocInfo(const char* file, int line, const char* allocName, PxAllocId::Enum allocId)
+00102         : mFileName(file)
+00103         , mLine(line)
+00104         , mAllocName(allocName)
+00105         , mAllocId(allocId)
+00106     {}
+00107 
+00109     inline  const char*         getFileName() const
+00110     {
+00111         return mFileName;
+00112     }
+00113 
+00115     inline  int                 getLine() const
+00116     {
+00117         return mLine;
+00118     }
+00119 
+00121     inline  const char*         getAllocName() const
+00122     {
+00123         return mAllocName;
+00124     }
+00125 
+00127     inline  PxAllocId::Enum     getAllocId() const
+00128     {
+00129         return mAllocId;
+00130     }
+00131 
+00132 private:
+00133     const char*         mFileName;
+00134     int                 mLine;
+00135     const char*         mAllocName;
+00136     PxAllocId::Enum     mAllocId;
+00137 };
+00138 
+00140 struct PxAllocIdStats
+00141 {
+00142     size_t size;        
+00143     size_t maxSize;     
+00144     size_t elements;    
+00145     size_t maxElements; 
+00146 };
+00147 
+00148 class PxCudaMemoryManager;
+00149 typedef size_t PxCudaBufferPtr;
+00150 
+00152 struct PxCudaBufferFlags
+00153 {
+00155     enum Enum
+00156     {
+00157         F_READ          = (1 << 0),
+00158         F_WRITE         = (1 << 1),
+00159         F_READ_WRITE    = F_READ | F_WRITE
+00160     };
+00161 };
+00162 
+00163 
+00165 struct PxCudaMemoryManagerStats
+00166 {
+00167 
+00168     size_t          heapSize;       
+00169     size_t          totalAllocated; 
+00170     size_t          maxAllocated;   
+00171     PxAllocIdStats  allocIdStats[PxAllocId::NUM_IDS]; 
+00172 };
+00173 
+00174 
+00176 struct PxCudaBufferType
+00177 {
+00179     PX_INLINE PxCudaBufferType(const PxCudaBufferType& t)
+00180         : memorySpace(t.memorySpace)
+00181         , flags(t.flags)
+00182     {}
+00183     
+00185     PX_INLINE PxCudaBufferType(PxCudaBufferMemorySpace::Enum _memSpace, PxCudaBufferFlags::Enum _flags)
+00186         : memorySpace(_memSpace)
+00187         , flags(_flags)
+00188     {}
+00189 
+00190     PxCudaBufferMemorySpace::Enum   memorySpace;    
+00191     PxCudaBufferFlags::Enum         flags;          
+00192 };
+00193 
+00194 
+00196 class PxCudaBuffer
+00197 {
+00198 public:
+00200     virtual PxCudaMemoryManager*            getCudaMemoryManager() const = 0;
+00201 
+00203     virtual bool                        free() = 0;
+00204 
+00209     virtual bool                        realloc(size_t size, PX_ALLOC_INFO_PARAMS_DECL(NULL, 0, NULL, UNASSIGNED)) = 0;
+00210 
+00212     virtual const PxCudaBufferType&     getType() const = 0;
+00213 
+00215     virtual PxCudaBufferPtr             getPtr() const = 0;
+00216 
+00218     virtual size_t                      getSize() const = 0;
+00219 
+00220 protected:
+00222     virtual ~PxCudaBuffer() {}
+00223 };
+00224 
+00225 
+00227 class PxCudaMemoryManager
+00228 {
+00229 public:
+00231     virtual PxCudaBuffer*               alloc(const PxCudaBufferType& type, size_t size, PX_ALLOC_INFO_PARAMS_DECL(NULL, 0, NULL, UNASSIGNED)) = 0;
+00232 
+00234     virtual PxCudaBufferPtr             alloc(PxCudaBufferMemorySpace::Enum memorySpace, size_t size, PX_ALLOC_INFO_PARAMS_DECL(NULL, 0, NULL, UNASSIGNED)) = 0;
+00235 
+00237     virtual bool                        free(PxCudaBufferMemorySpace::Enum memorySpace, PxCudaBufferPtr addr) = 0;
+00238 
+00240     virtual bool                        realloc(PxCudaBufferMemorySpace::Enum memorySpace, PxCudaBufferPtr addr, size_t size, PX_ALLOC_INFO_PARAMS_DECL(NULL, 0, NULL, UNASSIGNED)) = 0;
+00241 
+00243     virtual void                        getStats(const PxCudaBufferType& type, PxCudaMemoryManagerStats& outStats) = 0;
+00244 
+00247     virtual bool                        reserve(const PxCudaBufferType& type, size_t size) = 0;
+00248 
+00252     virtual bool                        setPageSize(const PxCudaBufferType& type, size_t size) = 0;
+00253 
+00256     virtual bool                        setMaxMemorySize(const PxCudaBufferType& type, size_t size) = 0;
+00257 
+00259     virtual size_t                      getBaseSize(const PxCudaBufferType& type) = 0;
+00260 
+00262     virtual size_t                      getPageSize(const PxCudaBufferType& type) = 0;
+00263 
+00265     virtual size_t                      getMaxMemorySize(const PxCudaBufferType& type) = 0;
+00266 
+00268     virtual PxCudaBufferPtr             getMappedPinnedPtr(PxCudaBufferPtr hostPtr) = 0;
+00269 
+00270 protected:
+00272     virtual ~PxCudaMemoryManager() {}
+00273 };
+00274 
+00275 PX_POP_PACK
+00276 
+00277 
+00278 } // end physx namespace
+00279 
+00280 #endif // PX_SUPPORT_GPU_PHYSX
+00281 #endif // PXCUDACONTEXTMANAGER_PXCUDAMEMORYMANAGER_H
+
+ +

+Copyright © 2008-2016 NVIDIA Corporation, 2701 San Tomas Expressway, Santa Clara, CA 95050 U.S.A. All rights reserved. www.nvidia.com + + -- cgit v1.2.3