From 3dfe2108cfab31ba3ee5527e217d0d8e99a51162 Mon Sep 17 00:00:00 2001 From: git perforce import user Date: Tue, 25 Oct 2016 12:29:14 -0600 Subject: Initial commit: PhysX 3.4.0 Update @ 21294896 APEX 1.4.0 Update @ 21275617 [CL 21300167] --- .../files/PxCudaContextManager_8h-source.html | 223 +++++++++++++++++++++ 1 file changed, 223 insertions(+) create mode 100644 PhysX_3.4/Documentation/PhysXAPI/files/PxCudaContextManager_8h-source.html (limited to 'PhysX_3.4/Documentation/PhysXAPI/files/PxCudaContextManager_8h-source.html') diff --git a/PhysX_3.4/Documentation/PhysXAPI/files/PxCudaContextManager_8h-source.html b/PhysX_3.4/Documentation/PhysXAPI/files/PxCudaContextManager_8h-source.html new file mode 100644 index 00000000..96dacfe0 --- /dev/null +++ b/PhysX_3.4/Documentation/PhysXAPI/files/PxCudaContextManager_8h-source.html @@ -0,0 +1,223 @@ + + + NVIDIA(R) PhysX(R) SDK 3.4 API Reference: PxCudaContextManager.h Source File + + + + + + + +

PxCudaContextManager.h

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00001 // This code contains NVIDIA Confidential Information and is disclosed to you
+00002 // under a form of NVIDIA software license agreement provided separately to you.
+00003 //
+00004 // Notice
+00005 // NVIDIA Corporation and its licensors retain all intellectual property and
+00006 // proprietary rights in and to this software and related documentation and
+00007 // any modifications thereto. Any use, reproduction, disclosure, or
+00008 // distribution of this software and related documentation without an express
+00009 // license agreement from NVIDIA Corporation is strictly prohibited.
+00010 //
+00011 // ALL NVIDIA DESIGN SPECIFICATIONS, CODE ARE PROVIDED "AS IS.". NVIDIA MAKES
+00012 // NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO
+00013 // THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT,
+00014 // MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE.
+00015 //
+00016 // Information and code furnished is believed to be accurate and reliable.
+00017 // However, NVIDIA Corporation assumes no responsibility for the consequences of use of such
+00018 // information or for any infringement of patents or other rights of third parties that may
+00019 // result from its use. No license is granted by implication or otherwise under any patent
+00020 // or patent rights of NVIDIA Corporation. Details are subject to change without notice.
+00021 // This code supersedes and replaces all information previously supplied.
+00022 // NVIDIA Corporation products are not authorized for use as critical
+00023 // components in life support devices or systems without express written approval of
+00024 // NVIDIA Corporation.
+00025 //
+00026 // Copyright (c) 2008-2016 NVIDIA Corporation. All rights reserved.
+00027 
+00028 
+00029 #ifndef PXCUDACONTEXTMANAGER_PXCUDACONTEXTMANAGER_H
+00030 #define PXCUDACONTEXTMANAGER_PXCUDACONTEXTMANAGER_H
+00031 
+00032 #include "foundation/PxPreprocessor.h"
+00033 
+00034 #if PX_SUPPORT_GPU_PHYSX
+00035 
+00036 #include "foundation/PxSimpleTypes.h"
+00037 #include "foundation/PxErrorCallback.h"
+00038 #include "foundation/PxFlags.h"
+00039 #include "task/PxTaskDefine.h"
+00040 #include "cudamanager/PxCudaMemoryManager.h"
+00041 
+00042 /* Forward decl to avoid inclusion of cuda.h */
+00043 typedef struct CUctx_st *CUcontext;
+00044 typedef struct CUgraphicsResource_st *CUgraphicsResource;
+00045 
+00046 namespace physx
+00047 { 
+00048     
+00049 class PxGpuDispatcher;
+00050 
+00051 
+00053 struct PxCudaInteropMode
+00054 {
+00058     enum Enum
+00059     {
+00060         NO_INTEROP = 0,
+00061         D3D10_INTEROP,
+00062         D3D11_INTEROP,
+00063         OGL_INTEROP,
+00064 
+00065         COUNT
+00066     };
+00067 };
+00068 
+00069 struct PxCudaInteropRegisterFlag
+00070 {
+00071     enum Enum
+00072     {
+00073         eNONE           = 0x00,
+00074         eREAD_ONLY      = 0x01,
+00075         eWRITE_DISCARD  = 0x02,
+00076         eSURFACE_LDST   = 0x04,
+00077         eTEXTURE_GATHER = 0x08
+00078     };
+00079 };
+00080 
+00086 typedef PxFlags<PxCudaInteropRegisterFlag::Enum, uint32_t> PxCudaInteropRegisterFlags;
+00087 PX_FLAGS_OPERATORS(PxCudaInteropRegisterFlag::Enum, uint32_t)
+00088 
+00089 
+00090 class PxCudaContextManagerDesc
+00091 {
+00092 public:
+00114     CUcontext            *ctx;
+00115 
+00123     void                 *graphicsDevice;
+00124 
+00125 #if PX_SUPPORT_GPU_PHYSX
+00126 
+00133     const char*          appGUID;
+00134 #endif
+00135 
+00142     PxCudaInteropMode::Enum interopMode;
+00143 
+00144 
+00160     uint32_t    memoryBaseSize[PxCudaBufferMemorySpace::COUNT];
+00161 
+00171     uint32_t    memoryPageSize[PxCudaBufferMemorySpace::COUNT];
+00172 
+00179     uint32_t    maxMemorySize[PxCudaBufferMemorySpace::COUNT];
+00180 
+00181     PX_INLINE PxCudaContextManagerDesc()
+00182     {
+00183         ctx = NULL;
+00184         interopMode = PxCudaInteropMode::NO_INTEROP;
+00185         graphicsDevice = 0;
+00186 #if PX_SUPPORT_GPU_PHYSX
+00187         appGUID  = NULL;
+00188 #endif
+00189         for(uint32_t i = 0; i < PxCudaBufferMemorySpace::COUNT; i++)
+00190         {
+00191             memoryBaseSize[i] = 0;
+00192             memoryPageSize[i] = 2 * 1024*1024;
+00193             maxMemorySize[i] = UINT32_MAX;
+00194         }
+00195     }
+00196 };
+00197 
+00198 
+00216 class PxCudaContextManager
+00217 {
+00218 public:
+00234     virtual void acquireContext() = 0;
+00235 
+00243     virtual void releaseContext() = 0;
+00244 
+00251     virtual PxCudaMemoryManager *getMemoryManager() = 0;
+00252 
+00257     virtual class physx::PxGpuDispatcher *getGpuDispatcher() = 0;
+00258 
+00268     virtual bool contextIsValid() const = 0;
+00269 
+00270     /* Query CUDA context and device properties, without acquiring context */
+00271 
+00272     virtual bool supportsArchSM10() const = 0;  
+00273     virtual bool supportsArchSM11() const = 0;  
+00274     virtual bool supportsArchSM12() const = 0;  
+00275     virtual bool supportsArchSM13() const = 0;  
+00276     virtual bool supportsArchSM20() const = 0;  
+00277     virtual bool supportsArchSM30() const = 0;  
+00278     virtual bool supportsArchSM35() const = 0;  
+00279     virtual bool supportsArchSM50() const = 0;  
+00280     virtual bool supportsArchSM52() const = 0;  
+00281     virtual bool supportsArchSM60() const = 0;  
+00282     virtual bool isIntegrated() const = 0;      
+00283     virtual bool canMapHostMemory() const = 0;  
+00284     virtual int  getDriverVersion() const = 0;  
+00285     virtual size_t getDeviceTotalMemBytes() const = 0; 
+00286     virtual int getMultiprocessorCount() const = 0; 
+00287     virtual unsigned int getClockRate() const = 0; 
+00288     virtual int  getSharedMemPerBlock() const = 0; 
+00289     virtual int  getSharedMemPerMultiprocessor() const = 0; 
+00290     virtual unsigned int getMaxThreadsPerBlock() const = 0; 
+00291     virtual const char *getDeviceName() const = 0; 
+00292     virtual PxCudaInteropMode::Enum getInteropMode() const = 0; 
+00293 
+00294     virtual void setUsingConcurrentStreams(bool) = 0; 
+00295     virtual bool getUsingConcurrentStreams() const = 0; 
+00296     /* End query methods that don't require context to be acquired */
+00297 
+00318     virtual bool registerResourceInCudaGL(CUgraphicsResource &resource, uint32_t buffer, PxCudaInteropRegisterFlags flags = PxCudaInteropRegisterFlags()) = 0;
+00319 
+00340     virtual bool registerResourceInCudaD3D(CUgraphicsResource &resource, void *resourcePointer, PxCudaInteropRegisterFlags flags = PxCudaInteropRegisterFlags()) = 0;
+00341 
+00349     virtual bool unregisterResourceInCuda(CUgraphicsResource resource) = 0;
+00350 
+00358     virtual int usingDedicatedGPU() const = 0;
+00359 
+00375     virtual void release() = 0;
+00376 
+00377 protected:
+00378 
+00382     virtual ~PxCudaContextManager() {}
+00383 };
+00384 
+00388 class PxScopedCudaLock
+00389 {
+00390 public:
+00394     PxScopedCudaLock(PxCudaContextManager& ctx) : mCtx(&ctx)
+00395     {
+00396         mCtx->acquireContext();
+00397     }
+00398 
+00402     ~PxScopedCudaLock()
+00403     {
+00404         mCtx->releaseContext();
+00405     }
+00406 
+00407 protected:
+00408 
+00412     PxCudaContextManager* mCtx;
+00413 };
+00414 
+00415 } // end physx namespace
+00416 
+00417 #endif // PX_SUPPORT_GPU_PHYSX
+00418 #endif // PXCUDACONTEXTMANAGER_PXCUDACONTEXTMANAGER_H
+
+ +

+Copyright © 2008-2016 NVIDIA Corporation, 2701 San Tomas Expressway, Santa Clara, CA 95050 U.S.A. All rights reserved. www.nvidia.com + + -- cgit v1.2.3