 1
+ 2
+ 3
+ 4
+ 5
+ 6
+ 7
+ 8
+ 9
+10
+11
+12
+13
+14
+15
+16
+17
+18
+19
+20
+21
+22
+23
+24
+25
+26
+27
+28
+29
+30
+31
+32
+33
+34
+35
+36
+37
+38
+39
+40
+41
+42
+43
+44
+45
+46
+47
+48
+49
+50
+51
+52
+53
+54
+55
+56
+57
+58
+59
+60
+61
+

+//! Interrupt Request Level (IRQL).
+
+/// IRQL type.
+pub type KIRQL = u8;
+
+/// Passive release level, no interrupt vectors are masked.
+pub const PASSIVE_LEVEL: KIRQL = 0;
+/// The lowest IRQL level, no interrupt vectors are masked.
+pub const LOW_LEVEL: KIRQL = 0;
+/// APC interrupt level.
+pub const APC_LEVEL: KIRQL = 1;
+/// Dispatcher level
+pub const DISPATCH_LEVEL: KIRQL = 2;
+
+/// Timer used for profiling.
+#[cfg(target_arch = "x86")]
+pub const PROFILE_LEVEL: KIRQL = 27;
+
+/// Interval clock level.
+#[cfg(target_arch = "x86")]
+pub const CLOCK_LEVEL: KIRQL = 28;
+
+/// Interprocessor interrupt level.
+#[cfg(target_arch = "x86")]
+pub const IPI_LEVEL: KIRQL = 29;
+
+/// Power failure level.
+#[cfg(target_arch = "x86")]
+pub const POWER_LEVEL: KIRQL = 30;
+
+/// Highest interrupt level.
+#[cfg(target_arch = "x86")]
+pub const HIGH_LEVEL: KIRQL = 31;
+
+/// Synchronization level.
+#[cfg(target_arch = "x86")]
+pub const SYNCH_LEVEL: KIRQL = 29 - 2;
+
+/// Interval clock level.
+#[cfg(target_arch = "x86_64")]
+pub const CLOCK_LEVEL: KIRQL = 13;
+
+/// Interprocessor interrupt level.
+#[cfg(target_arch = "x86_64")]
+pub const IPI_LEVEL: KIRQL = 14;
+
+/// Power failure level.
+#[cfg(target_arch = "x86_64")]
+pub const POWER_LEVEL: KIRQL = 15;
+
+/// Timer used for profiling.
+#[cfg(target_arch = "x86_64")]
+pub const PROFILE_LEVEL: KIRQL = 16;
+
+/// Highest interrupt level.
+#[cfg(target_arch = "x86_64")]
+pub const HIGH_LEVEL: KIRQL = 17;
+
+/// Synchronization level.
+#[cfg(target_arch = "x86_64")]
+pub const SYNCH_LEVEL: KIRQL = 14- 2;
+

+