From a3ec0b1f643d00b9418e4884bd7caa07bf052201 Mon Sep 17 00:00:00 2001 From: Marijn Haverbeke Date: Fri, 6 May 2011 22:13:13 +0200 Subject: Rename std modules to be camelcased (Have fun mergining your stuff with this.) --- src/test/run-pass/vec-alloc-append.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/test/run-pass/vec-alloc-append.rs') diff --git a/src/test/run-pass/vec-alloc-append.rs b/src/test/run-pass/vec-alloc-append.rs index 616823ae..4327e789 100644 --- a/src/test/run-pass/vec-alloc-append.rs +++ b/src/test/run-pass/vec-alloc-append.rs @@ -6,7 +6,7 @@ use std; fn slice[T](vec[T] e) { - let vec[T] result = std._vec.alloc[T](1 as uint); + let vec[T] result = std.Vec.alloc[T](1 as uint); log "alloced"; result += e; log "appended"; -- cgit v1.2.3